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Searched refs:mmDP_AUX2_AUX_INTERRUPT_CONTROL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3469 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x18AB macro
H A Ddce_8_0_d.h4203 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x18ab macro
H A Ddce_10_0_d.h4851 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x5c3b macro
H A Ddce_11_0_d.h4930 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x5c3b macro
H A Ddce_11_2_d.h6192 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x5c3b macro
H A Ddce_12_0_offset.h9882 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7660 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_1_0_offset.h7997 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_2_1_0_offset.h9551 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_2_offset.h9227 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_2_0_0_offset.h10604 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro
H A Ddcn_3_0_0_offset.h10321 #define mmDP_AUX2_AUX_INTERRUPT_CONTROL … macro