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Searched refs:mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3433 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x1888 macro
H A Ddce_8_0_d.h4236 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x1888 macro
H A Ddce_10_0_d.h4884 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x5c08 macro
H A Ddce_11_0_d.h4963 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x5c08 macro
H A Ddce_11_2_d.h6225 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x5c08 macro
H A Ddce_12_0_offset.h9816 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5238 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_3_0_3_offset.h4697 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_3_0_1_offset.h7586 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_1_0_offset.h7931 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_2_1_0_offset.h9477 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_3_0_2_offset.h9153 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_2_0_0_offset.h10530 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro
H A Ddcn_3_0_0_offset.h10247 #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL … macro