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Searched refs:mmDP5_DP_SEC_CNTL (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3410 #define mmDP5_DP_SEC_CNTL 0x4BA0 macro
H A Ddce_8_0_d.h4009 #define mmDP5_DP_SEC_CNTL 0x4ba0 macro
H A Ddce_10_0_d.h4641 #define mmDP5_DP_SEC_CNTL 0x4fc3 macro
H A Ddce_11_0_d.h4672 #define mmDP5_DP_SEC_CNTL 0x4fc3 macro
H A Ddce_11_2_d.h5904 #define mmDP5_DP_SEC_CNTL 0x4fc3 macro
H A Ddce_12_0_offset.h11678 #define mmDP5_DP_SEC_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9957 #define mmDP5_DP_SEC_CNTL … macro
H A Ddcn_3_0_2_offset.h11299 #define mmDP5_DP_SEC_CNTL … macro
H A Ddcn_2_0_0_offset.h12644 #define mmDP5_DP_SEC_CNTL … macro
H A Ddcn_3_0_0_offset.h12443 #define mmDP5_DP_SEC_CNTL … macro