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Searched refs:mmDP5_DP_DPHY_CNTL (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3377 #define mmDP5_DP_DPHY_CNTL 0x4BD0 macro
H A Ddce_8_0_d.h3873 #define mmDP5_DP_DPHY_CNTL 0x4bd0 macro
H A Ddce_10_0_d.h4505 #define mmDP5_DP_DPHY_CNTL 0x4faf macro
H A Ddce_11_0_d.h4483 #define mmDP5_DP_DPHY_CNTL 0x4faf macro
H A Ddce_11_2_d.h5715 #define mmDP5_DP_DPHY_CNTL 0x4faf macro
H A Ddce_12_0_offset.h11644 #define mmDP5_DP_DPHY_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9927 #define mmDP5_DP_DPHY_CNTL macro
H A Ddcn_3_0_2_offset.h11269 #define mmDP5_DP_DPHY_CNTL macro
H A Ddcn_2_0_0_offset.h12614 #define mmDP5_DP_DPHY_CNTL macro
H A Ddcn_3_0_0_offset.h12413 #define mmDP5_DP_DPHY_CNTL macro