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Searched refs:mmDP4_DP_VID_TIMING (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3374 #define mmDP4_DP_VID_TIMING 0x48C9 macro
H A Ddce_8_0_d.h3816 #define mmDP4_DP_VID_TIMING 0x48c9 macro
H A Ddce_10_0_d.h4448 #define mmDP4_DP_VID_TIMING 0x4ea8 macro
H A Ddce_11_0_d.h4412 #define mmDP4_DP_VID_TIMING 0x4ea8 macro
H A Ddce_11_2_d.h5644 #define mmDP4_DP_VID_TIMING 0x4ea8 macro
H A Ddce_12_0_offset.h11346 #define mmDP4_DP_VID_TIMING … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9603 #define mmDP4_DP_VID_TIMING … macro
H A Ddcn_2_1_0_offset.h11187 #define mmDP4_DP_VID_TIMING … macro
H A Ddcn_3_0_2_offset.h10919 #define mmDP4_DP_VID_TIMING … macro
H A Ddcn_2_0_0_offset.h12272 #define mmDP4_DP_VID_TIMING … macro
H A Ddcn_3_0_0_offset.h12055 #define mmDP4_DP_VID_TIMING … macro