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Searched refs:mmDP3_DP_VID_TIMING (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3322 #define mmDP3_DP_VID_TIMING 0x45C9 macro
H A Ddce_8_0_d.h3815 #define mmDP3_DP_VID_TIMING 0x45c9 macro
H A Ddce_10_0_d.h4447 #define mmDP3_DP_VID_TIMING 0x4da8 macro
H A Ddce_11_0_d.h4411 #define mmDP3_DP_VID_TIMING 0x4da8 macro
H A Ddce_11_2_d.h5643 #define mmDP3_DP_VID_TIMING 0x4da8 macro
H A Ddce_12_0_offset.h11062 #define mmDP3_DP_VID_TIMING … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8954 #define mmDP3_DP_VID_TIMING … macro
H A Ddcn_1_0_offset.h9293 #define mmDP3_DP_VID_TIMING … macro
H A Ddcn_2_1_0_offset.h10857 #define mmDP3_DP_VID_TIMING … macro
H A Ddcn_3_0_2_offset.h10576 #define mmDP3_DP_VID_TIMING … macro
H A Ddcn_2_0_0_offset.h11944 #define mmDP3_DP_VID_TIMING … macro
H A Ddcn_3_0_0_offset.h11712 #define mmDP3_DP_VID_TIMING … macro