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Searched refs:mmDP2_DP_SEC_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3254 #define mmDP2_DP_SEC_CNTL 0x42A0 macro
H A Ddce_8_0_d.h4006 #define mmDP2_DP_SEC_CNTL 0x42a0 macro
H A Ddce_10_0_d.h4638 #define mmDP2_DP_SEC_CNTL 0x4cc3 macro
H A Ddce_11_0_d.h4669 #define mmDP2_DP_SEC_CNTL 0x4cc3 macro
H A Ddce_11_2_d.h5901 #define mmDP2_DP_SEC_CNTL 0x4cc3 macro
H A Ddce_12_0_offset.h10826 #define mmDP2_DP_SEC_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8658 #define mmDP2_DP_SEC_CNTL macro
H A Ddcn_1_0_offset.h9027 #define mmDP2_DP_SEC_CNTL macro
H A Ddcn_2_1_0_offset.h10571 #define mmDP2_DP_SEC_CNTL macro
H A Ddcn_3_0_2_offset.h10276 #define mmDP2_DP_SEC_CNTL macro
H A Ddcn_2_0_0_offset.h11660 #define mmDP2_DP_SEC_CNTL macro
H A Ddcn_3_0_0_offset.h11412 #define mmDP2_DP_SEC_CNTL macro