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Searched refs:mmDP1_DP_LINK_CNTL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3183 #define mmDP1_DP_LINK_CNTL 0x1FC0 macro
H A Ddce_8_0_d.h3757 #define mmDP1_DP_LINK_CNTL 0x1fc0 macro
H A Ddce_10_0_d.h4389 #define mmDP1_DP_LINK_CNTL 0x4ba0 macro
H A Ddce_11_0_d.h4339 #define mmDP1_DP_LINK_CNTL 0x4ba0 macro
H A Ddce_11_2_d.h5571 #define mmDP1_DP_LINK_CNTL 0x4ba0 macro
H A Ddce_12_0_offset.h10480 #define mmDP1_DP_LINK_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5784 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_3_0_3_offset.h5291 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_3_0_1_offset.h8258 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_1_0_offset.h8659 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_2_1_0_offset.h10181 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_3_0_2_offset.h9873 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_2_0_0_offset.h11274 #define mmDP1_DP_LINK_CNTL … macro
H A Ddcn_3_0_0_offset.h11009 #define mmDP1_DP_LINK_CNTL … macro