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Searched refs:mmDP0_DP_MSA_MISC (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3134 #define mmDP0_DP_MSA_MISC 0x1CC5 macro
H A Ddce_8_0_d.h3804 #define mmDP0_DP_MSA_MISC 0x1cc5 macro
H A Ddce_10_0_d.h4436 #define mmDP0_DP_MSA_MISC 0x4aa6 macro
H A Ddce_11_0_d.h4398 #define mmDP0_DP_MSA_MISC 0x4aa6 macro
H A Ddce_11_2_d.h5630 #define mmDP0_DP_MSA_MISC 0x4aa6 macro
H A Ddce_12_0_offset.h10208 #define mmDP0_DP_MSA_MISC macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5476 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_3_0_3_offset.h4960 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_3_0_1_offset.h7930 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_1_0_offset.h8361 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_2_1_0_offset.h9863 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_3_0_2_offset.h9542 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_2_0_0_offset.h10958 #define mmDP0_DP_MSA_MISC macro
H A Ddcn_3_0_0_offset.h10678 #define mmDP0_DP_MSA_MISC macro