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Searched refs:mmDP0_DP_LINK_CNTL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3131 #define mmDP0_DP_LINK_CNTL 0x1CC0 macro
H A Ddce_8_0_d.h3756 #define mmDP0_DP_LINK_CNTL 0x1cc0 macro
H A Ddce_10_0_d.h4388 #define mmDP0_DP_LINK_CNTL 0x4aa0 macro
H A Ddce_11_0_d.h4338 #define mmDP0_DP_LINK_CNTL 0x4aa0 macro
H A Ddce_11_2_d.h5570 #define mmDP0_DP_LINK_CNTL 0x4aa0 macro
H A Ddce_12_0_offset.h10196 #define mmDP0_DP_LINK_CNTL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5464 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_3_0_3_offset.h4948 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_3_0_1_offset.h7918 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_1_0_offset.h8349 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_2_1_0_offset.h9851 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_3_0_2_offset.h9530 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_2_0_0_offset.h10946 #define mmDP0_DP_LINK_CNTL macro
H A Ddcn_3_0_0_offset.h10666 #define mmDP0_DP_LINK_CNTL macro