Home
last modified time | relevance | path

Searched refs:mmDMCU_UC_INTERNAL_INT_STATUS (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3039 #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 macro
H A Ddce_8_0_d.h3717 #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 macro
H A Ddce_10_0_d.h4342 #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 macro
H A Ddce_11_0_d.h4295 #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 macro
H A Ddce_11_2_d.h5526 #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 macro
H A Ddce_12_0_offset.h1262 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h351 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_3_0_1_offset.h546 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_1_0_offset.h976 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_2_1_0_offset.h606 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_3_0_2_offset.h518 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_2_0_0_offset.h644 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro
H A Ddcn_3_0_0_offset.h530 #define mmDMCU_UC_INTERNAL_INT_STATUS … macro