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Searched refs:mmDMCU_FW_ISR_START_ADDR (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3022 #define mmDMCU_FW_ISR_START_ADDR 0x1605 macro
H A Ddce_8_0_d.h3704 #define mmDMCU_FW_ISR_START_ADDR 0x1605 macro
H A Ddce_10_0_d.h4329 #define mmDMCU_FW_ISR_START_ADDR 0x1605 macro
H A Ddce_11_0_d.h4282 #define mmDMCU_FW_ISR_START_ADDR 0x1605 macro
H A Ddce_11_2_d.h5513 #define mmDMCU_FW_ISR_START_ADDR 0x1605 macro
H A Ddce_12_0_offset.h1236 #define mmDMCU_FW_ISR_START_ADDR … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h325 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_3_0_1_offset.h520 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_1_0_offset.h950 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_2_1_0_offset.h580 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_3_0_2_offset.h492 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_2_0_0_offset.h618 #define mmDMCU_FW_ISR_START_ADDR … macro
H A Ddcn_3_0_0_offset.h504 #define mmDMCU_FW_ISR_START_ADDR … macro