Searched refs:mmDMA5_CORE_CFG_1 (Results 1 – 3 of 3) sorted by relevance
24 #define mmDMA5_CORE_CFG_1 0x5A0004 macro
3493 WREG32(mmDMA5_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT); in gaudi_pci_dma_stall()
4997 mask |= 1U << ((mmDMA5_CORE_CFG_1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()