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Searched refs:mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2816 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4580 macro
H A Ddce_8_0_d.h3435 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4580 macro
H A Ddce_10_0_d.h4214 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4d6f macro
H A Ddce_11_0_d.h4151 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4d6f macro
H A Ddce_11_2_d.h5382 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4d6f macro
H A Ddce_12_0_offset.h11026 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8918 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_2_1_0_offset.h10811 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_1_0_offset.h9255 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_2_offset.h10536 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_2_0_0_offset.h11900 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro
H A Ddcn_3_0_0_offset.h11672 #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 … macro