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Searched refs:mmDIG0_TMDS_CONTROL_CHAR (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2554 #define mmDIG0_TMDS_CONTROL_CHAR 0x1C7D macro
H A Ddce_8_0_d.h3408 #define mmDIG0_TMDS_CONTROL_CHAR 0x1c7d macro
H A Ddce_10_0_d.h4187 #define mmDIG0_TMDS_CONTROL_CHAR 0x4a6c macro
H A Ddce_11_0_d.h4118 #define mmDIG0_TMDS_CONTROL_CHAR 0x4a6c macro
H A Ddce_11_2_d.h5349 #define mmDIG0_TMDS_CONTROL_CHAR 0x4a6c macro
H A Ddce_12_0_offset.h10168 #define mmDIG0_TMDS_CONTROL_CHAR … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5430 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_3_0_3_offset.h4919 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_3_0_1_offset.h7892 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_1_0_offset.h8319 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_2_1_0_offset.h9815 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_3_0_2_offset.h9501 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_2_0_0_offset.h10910 #define mmDIG0_TMDS_CONTROL_CHAR … macro
H A Ddcn_3_0_0_offset.h10637 #define mmDIG0_TMDS_CONTROL_CHAR … macro