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Searched refs:mmDIG0_HDMI_ACR_48_0 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2537 #define mmDIG0_HDMI_ACR_48_0 0x1C3B macro
H A Ddce_8_0_d.h3216 #define mmDIG0_HDMI_ACR_48_0 0x1c3b macro
H A Ddce_10_0_d.h3995 #define mmDIG0_HDMI_ACR_48_0 0x4a32 macro
H A Ddce_11_0_d.h3868 #define mmDIG0_HDMI_ACR_48_0 0x4a32 macro
H A Ddce_11_2_d.h5099 #define mmDIG0_HDMI_ACR_48_0 0x4a32 macro
H A Ddce_12_0_offset.h10122 #define mmDIG0_HDMI_ACR_48_0 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5384 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_3_0_3_offset.h4903 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_3_0_1_offset.h7876 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_1_0_offset.h8273 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_2_1_0_offset.h9769 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_3_0_2_offset.h9485 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_2_0_0_offset.h10864 #define mmDIG0_HDMI_ACR_48_0 … macro
H A Ddcn_3_0_0_offset.h10621 #define mmDIG0_HDMI_ACR_48_0 … macro