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Searched refs:mmDC_PINSTRAPS_BASE_IDX (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/
H A Ddcn201_resource.c838 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_resource.c812 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/
H A Ddcn303_resource.c857 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/
H A Ddcn302_resource.c930 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/
H A Ddcn21_resource.c1101 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_resource.c933 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_resource.c963 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_resource.c988 generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX), in read_dce_straps()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5939 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_3_0_3_offset.h5470 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_3_0_1_offset.h9125 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_1_0_offset.h10390 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_2_1_0_offset.h11350 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_3_0_2_offset.h11430 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_2_0_0_offset.h12767 #define mmDC_PINSTRAPS_BASE_IDX macro
H A Ddcn_3_0_0_offset.h12578 #define mmDC_PINSTRAPS_BASE_IDX macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1845 #define mmDC_PINSTRAPS_BASE_IDX macro