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Searched refs:mmDC_I2C_DDC5_SETUP (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1327 #define mmDC_I2C_DDC5_SETUP 0x182C macro
H A Ddce_8_0_d.h3561 #define mmDC_I2C_DDC5_SETUP 0x182c macro
H A Ddce_10_0_d.h7175 #define mmDC_I2C_DDC5_SETUP 0x16e7 macro
H A Ddce_11_0_d.h7365 #define mmDC_I2C_DDC5_SETUP 0x16e7 macro
H A Ddce_11_2_d.h8757 #define mmDC_I2C_DDC5_SETUP 0x16e7 macro
H A Ddce_12_0_offset.h1674 #define mmDC_I2C_DDC5_SETUP macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h7705 #define mmDC_I2C_DDC5_SETUP macro
H A Ddcn_2_1_0_offset.h9297 #define mmDC_I2C_DDC5_SETUP macro
H A Ddcn_3_0_2_offset.h8983 #define mmDC_I2C_DDC5_SETUP macro
H A Ddcn_2_0_0_offset.h10330 #define mmDC_I2C_DDC5_SETUP macro
H A Ddcn_3_0_0_offset.h10059 #define mmDC_I2C_DDC5_SETUP macro