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Searched refs:mmDC_I2C_DDC2_SETUP (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1318 #define mmDC_I2C_DDC2_SETUP 0x1826 macro
H A Ddce_8_0_d.h3555 #define mmDC_I2C_DDC2_SETUP 0x1826 macro
H A Ddce_10_0_d.h7169 #define mmDC_I2C_DDC2_SETUP 0x16e1 macro
H A Ddce_11_0_d.h7359 #define mmDC_I2C_DDC2_SETUP 0x16e1 macro
H A Ddce_11_2_d.h8751 #define mmDC_I2C_DDC2_SETUP 0x16e1 macro
H A Ddce_12_0_offset.h1662 #define mmDC_I2C_DDC2_SETUP … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5129 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_3_0_3_offset.h4569 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_3_0_1_offset.h7422 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_1_0_offset.h7693 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_2_1_0_offset.h9285 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_3_0_2_offset.h8971 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_2_0_0_offset.h10318 #define mmDC_I2C_DDC2_SETUP … macro
H A Ddcn_3_0_0_offset.h10047 #define mmDC_I2C_DDC2_SETUP … macro