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Searched refs:mmDCP5_DCP_GSL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2332 #define mmDCP5_DCP_GSL_CONTROL 0x4990 macro
H A Ddce_8_0_d.h2528 #define mmDCP5_DCP_GSL_CONTROL 0x4990 macro
H A Ddce_10_0_d.h3307 #define mmDCP5_DCP_GSL_CONTROL 0x4490 macro
H A Ddce_11_0_d.h3068 #define mmDCP5_DCP_GSL_CONTROL 0x4490 macro
H A Ddce_11_2_d.h4299 #define mmDCP5_DCP_GSL_CONTROL 0x4490 macro
H A Ddce_12_0_offset.h7644 #define mmDCP5_DCP_GSL_CONTROL … macro