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Searched refs:mmDCIO_GSL_GENLK_PAD_CNTL (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1352 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
H A Ddce_8_0_d.h1290 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
H A Ddce_10_0_d.h1577 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_11_0_d.h1402 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_11_2_d.h1482 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_12_0_offset.h1868 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5489 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_3_0_1_offset.h9144 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_1_0_offset.h10411 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_2_1_0_offset.h11369 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_3_0_2_offset.h11449 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_2_0_0_offset.h12786 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
H A Ddcn_3_0_0_offset.h12597 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro