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Searched refs:mmDCCG_SOFT_RESET (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1193 #define mmDCCG_SOFT_RESET 0x015F macro
H A Ddce_8_0_d.h1063 #define mmDCCG_SOFT_RESET 0x15f macro
H A Ddce_10_0_d.h1214 #define mmDCCG_SOFT_RESET 0x15f macro
H A Ddce_11_0_d.h1027 #define mmDCCG_SOFT_RESET 0x15f macro
H A Ddce_11_2_d.h1106 #define mmDCCG_SOFT_RESET 0x15f macro
H A Ddce_12_0_offset.h820 #define mmDCCG_SOFT_RESET macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h120 #define mmDCCG_SOFT_RESET macro
H A Ddcn_3_0_3_offset.h207 #define mmDCCG_SOFT_RESET macro
H A Ddcn_3_0_1_offset.h320 #define mmDCCG_SOFT_RESET macro
H A Ddcn_1_0_offset.h634 #define mmDCCG_SOFT_RESET macro
H A Ddcn_2_1_0_offset.h276 #define mmDCCG_SOFT_RESET macro
H A Ddcn_3_0_2_offset.h270 #define mmDCCG_SOFT_RESET macro
H A Ddcn_2_0_0_offset.h286 #define mmDCCG_SOFT_RESET macro
H A Ddcn_3_0_0_offset.h268 #define mmDCCG_SOFT_RESET macro