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Searched refs:mmD5VGA_CONTROL (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c407 offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL; in dce120_timing_generator_disable_vga()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c1819 addr = mmD5VGA_CONTROL; in dce110_timing_generator_disable_vga()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1045 #define mmD5VGA_CONTROL 0x00FA macro
H A Ddce_8_0_d.h5148 #define mmD5VGA_CONTROL 0xfa macro
H A Ddce_10_0_d.h6031 #define mmD5VGA_CONTROL 0xfa macro
H A Ddce_11_0_d.h6108 #define mmD5VGA_CONTROL 0xfa macro
H A Ddce_11_2_d.h7782 #define mmD5VGA_CONTROL 0xfa macro
H A Ddce_12_0_offset.h644 #define mmD5VGA_CONTROL macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c1745 mmD5VGA_CONTROL,
H A Ddce_v6_0.c1785 mmD5VGA_CONTROL,
H A Ddce_v10_0.c1812 mmD5VGA_CONTROL,
H A Ddce_v11_0.c1862 mmD5VGA_CONTROL,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h107 #define mmD5VGA_CONTROL macro
H A Ddcn_3_0_1_offset.h190 #define mmD5VGA_CONTROL macro
H A Ddcn_1_0_offset.h454 #define mmD5VGA_CONTROL macro
H A Ddcn_2_1_0_offset.h142 #define mmD5VGA_CONTROL macro
H A Ddcn_3_0_2_offset.h122 #define mmD5VGA_CONTROL macro
H A Ddcn_2_0_0_offset.h122 #define mmD5VGA_CONTROL macro
H A Ddcn_3_0_0_offset.h104 #define mmD5VGA_CONTROL macro