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Searched refs:mmBL_PWM_CNTL (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h475 #define mmBL_PWM_CNTL 0x191E macro
H A Ddce_8_0_d.h1286 #define mmBL_PWM_CNTL 0x191e macro
H A Ddce_10_0_d.h1573 #define mmBL_PWM_CNTL 0x4820 macro
H A Ddce_11_0_d.h1398 #define mmBL_PWM_CNTL 0x4820 macro
H A Ddce_11_2_d.h1478 #define mmBL_PWM_CNTL 0x4820 macro
H A Ddce_12_0_offset.h1860 #define mmBL_PWM_CNTL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5481 #define mmBL_PWM_CNTL … macro
H A Ddcn_1_0_offset.h10403 #define mmBL_PWM_CNTL … macro
H A Ddcn_2_1_0_offset.h11361 #define mmBL_PWM_CNTL … macro
H A Ddcn_3_0_2_offset.h11441 #define mmBL_PWM_CNTL … macro
H A Ddcn_2_0_0_offset.h12778 #define mmBL_PWM_CNTL … macro
H A Ddcn_3_0_0_offset.h12589 #define mmBL_PWM_CNTL … macro