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Searched refs:mmAZALIA_BDL_DMA_CONTROL (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h412 #define mmAZALIA_BDL_DMA_CONTROL 0x17BF macro
H A Ddce_8_0_d.h5436 #define mmAZALIA_BDL_DMA_CONTROL 0x17bf macro
H A Ddce_10_0_d.h6677 #define mmAZALIA_BDL_DMA_CONTROL 0x17ea macro
H A Ddce_11_0_d.h6839 #define mmAZALIA_BDL_DMA_CONTROL 0x17ea macro
H A Ddce_11_2_d.h8184 #define mmAZALIA_BDL_DMA_CONTROL 0x17ea macro
H A Ddce_12_0_offset.h1480 #define mmAZALIA_BDL_DMA_CONTROL … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h213 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_3_0_3_offset.h1161 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_3_0_1_offset.h1362 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_2_1_0_offset.h1408 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_1_0_offset.h1802 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_3_0_2_offset.h1334 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_2_0_0_offset.h1446 #define mmAZALIA_BDL_DMA_CONTROL … macro
H A Ddcn_3_0_0_offset.h1348 #define mmAZALIA_BDL_DMA_CONTROL … macro