Home
last modified time | relevance | path

Searched refs:mhz (Results 1 – 25 of 122) sorted by relevance

12345

/openbmc/linux/drivers/phy/intel/
H A Dphy-intel-keembay-emmc.c59 unsigned int mhz; in keembay_emmc_phy_power() local
84 mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000); in keembay_emmc_phy_power()
85 if (mhz <= 200 && mhz >= 170) in keembay_emmc_phy_power()
87 else if (mhz <= 170 && mhz >= 140) in keembay_emmc_phy_power()
89 else if (mhz <= 140 && mhz >= 110) in keembay_emmc_phy_power()
91 else if (mhz <= 110 && mhz >= 80) in keembay_emmc_phy_power()
93 else if (mhz <= 80 && mhz >= 50) in keembay_emmc_phy_power()
99 if (mhz > 175) in keembay_emmc_phy_power()
100 dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz); in keembay_emmc_phy_power()
156 if (mhz == 0) in keembay_emmc_phy_power()
/openbmc/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
55 mhz values (normalized w.r.t. the highest value found while parsing the DT).
62 The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024)
128 capacity-dmips-mhz = <1024>;
139 capacity-dmips-mhz = <1024>;
150 capacity-dmips-mhz = <578>;
161 capacity-dmips-mhz = <578>;
172 capacity-dmips-mhz = <578>;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-cpus.dtsi66 capacity-dmips-mhz = <1024>;
78 capacity-dmips-mhz = <1024>;
90 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
114 capacity-dmips-mhz = <539>;
126 capacity-dmips-mhz = <539>;
138 capacity-dmips-mhz = <539>;
150 capacity-dmips-mhz = <539>;
H A Dexynos5422-cpus.dtsi65 capacity-dmips-mhz = <539>;
78 capacity-dmips-mhz = <539>;
91 capacity-dmips-mhz = <539>;
104 capacity-dmips-mhz = <539>;
117 capacity-dmips-mhz = <1024>;
130 capacity-dmips-mhz = <1024>;
143 capacity-dmips-mhz = <1024>;
156 capacity-dmips-mhz = <1024>;
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxm.dtsi46 capacity-dmips-mhz = <1024>;
50 capacity-dmips-mhz = <1024>;
54 capacity-dmips-mhz = <1024>;
58 capacity-dmips-mhz = <1024>;
66 capacity-dmips-mhz = <1024>;
77 capacity-dmips-mhz = <1024>;
88 capacity-dmips-mhz = <1024>;
99 capacity-dmips-mhz = <1024>;
H A Dmeson-g12b.dtsi51 capacity-dmips-mhz = <592>;
61 capacity-dmips-mhz = <592>;
71 capacity-dmips-mhz = <1024>;
81 capacity-dmips-mhz = <1024>;
91 capacity-dmips-mhz = <1024>;
101 capacity-dmips-mhz = <1024>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsdm632.dtsi65 capacity-dmips-mhz = <1980>;
70 capacity-dmips-mhz = <1980>;
75 capacity-dmips-mhz = <1980>;
80 capacity-dmips-mhz = <1980>;
H A Dsdm660.dtsi90 capacity-dmips-mhz = <1024>;
96 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
108 capacity-dmips-mhz = <1024>;
114 capacity-dmips-mhz = <640>;
120 capacity-dmips-mhz = <640>;
126 capacity-dmips-mhz = <640>;
132 capacity-dmips-mhz = <640>;
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt6002.dtsi77 capacity-dmips-mhz = <714>;
91 capacity-dmips-mhz = <714>;
105 capacity-dmips-mhz = <1024>;
119 capacity-dmips-mhz = <1024>;
133 capacity-dmips-mhz = <1024>;
147 capacity-dmips-mhz = <1024>;
161 capacity-dmips-mhz = <1024>;
175 capacity-dmips-mhz = <1024>;
189 capacity-dmips-mhz = <1024>;
203 capacity-dmips-mhz = <1024>;
H A Dt600x-common.dtsi69 capacity-dmips-mhz = <714>;
83 capacity-dmips-mhz = <714>;
97 capacity-dmips-mhz = <1024>;
111 capacity-dmips-mhz = <1024>;
125 capacity-dmips-mhz = <1024>;
139 capacity-dmips-mhz = <1024>;
153 capacity-dmips-mhz = <1024>;
167 capacity-dmips-mhz = <1024>;
181 capacity-dmips-mhz = <1024>;
195 capacity-dmips-mhz = <1024>;
/openbmc/u-boot/arch/xtensa/lib/
H A Dtime.c52 ulong mhz = CONFIG_SYS_CLK_FREQ / 1000000; in __udelay() local
59 delay_cycles(mhz << 22); in __udelay()
60 delay_cycles(mhz * lo); in __udelay()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h118 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
124 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
129 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
134 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
/openbmc/linux/net/wireless/
H A Dchan.c146 int mhz; in nl80211_chan_width_to_mhz() local
150 mhz = 1; in nl80211_chan_width_to_mhz()
153 mhz = 2; in nl80211_chan_width_to_mhz()
156 mhz = 4; in nl80211_chan_width_to_mhz()
159 mhz = 8; in nl80211_chan_width_to_mhz()
162 mhz = 16; in nl80211_chan_width_to_mhz()
165 mhz = 5; in nl80211_chan_width_to_mhz()
168 mhz = 10; in nl80211_chan_width_to_mhz()
172 mhz = 20; in nl80211_chan_width_to_mhz()
175 mhz = 40; in nl80211_chan_width_to_mhz()
[all …]
/openbmc/u-boot/arch/xtensa/cpu/
H A Dcpu.c30 char buf[120], mhz[8]; in print_cpuinfo() local
38 XCHAL_CORE_ID, id0, id1, strmhz(mhz, gd->cpu_clk)); in print_cpuinfo()
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-r2.dts102 capacity-dmips-mhz = <1024>;
120 capacity-dmips-mhz = <1024>;
138 capacity-dmips-mhz = <485>;
156 capacity-dmips-mhz = <485>;
174 capacity-dmips-mhz = <485>;
192 capacity-dmips-mhz = <485>;
H A Djuno-r1.dts102 capacity-dmips-mhz = <1024>;
119 capacity-dmips-mhz = <1024>;
136 capacity-dmips-mhz = <578>;
153 capacity-dmips-mhz = <578>;
170 capacity-dmips-mhz = <578>;
187 capacity-dmips-mhz = <578>;
H A Djuno.dts101 capacity-dmips-mhz = <1024>;
119 capacity-dmips-mhz = <1024>;
137 capacity-dmips-mhz = <578>;
155 capacity-dmips-mhz = <578>;
173 capacity-dmips-mhz = <578>;
191 capacity-dmips-mhz = <578>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmaxim,max9485.txt34 xo-27mhz: xo-27mhz {
45 clocks = <&xo-27mhz>;
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c545 static void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, int mhz) in pp_rv_set_hard_min_fclk_by_freq() argument
550 amdgpu_dpm_set_hard_min_fclk_by_freq(adev, mhz); in pp_rv_set_hard_min_fclk_by_freq()
581 pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz) in pp_nv_set_min_deep_sleep_dcfclk() argument
588 ret = amdgpu_dpm_set_min_deep_sleep_dcefclk(adev, mhz); in pp_nv_set_min_deep_sleep_dcfclk()
598 struct pp_smu *pp, int mhz) in pp_nv_set_hard_min_dcefclk_by_freq() argument
606 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()
621 pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz) in pp_nv_set_hard_min_uclk_by_freq() argument
629 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()
657 enum pp_smu_nv_clock_id clock_id, int mhz) in pp_nv_set_voltage_by_freq() argument
677 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_voltage_by_freq()
/openbmc/linux/arch/s390/kernel/
H A Dprocessor.c51 unsigned long mhz; in update_cpu_mhz() local
54 mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0); in update_cpu_mhz()
56 c->cpu_mhz_dynamic = mhz >> 32; in update_cpu_mhz()
57 c->cpu_mhz_static = mhz & 0xffffffff; in update_cpu_mhz()
/openbmc/linux/drivers/mmc/host/
H A Dsdhci-of-arasan.c1189 u32 mhz = DIV_ROUND_CLOSEST_ULL(clk_get_rate(pltfm_host->clk), 1000000); in sdhci_arasan_update_baseclkfreq() local
1202 sdhci_arasan_syscon_write(host, &soc_ctl_map->baseclkfreq, mhz); in sdhci_arasan_update_baseclkfreq()
1739 u32 mhz, node_id = !strcmp(clk_name, "clk_out_sd0") ? NODE_SD_0 : NODE_SD_1; in sdhci_zynqmp_set_dynamic_config() local
1763 mhz = DIV_ROUND_CLOSEST_ULL(clk_get_rate(pltfm_host->clk), 1000000); in sdhci_zynqmp_set_dynamic_config()
1764 if (mhz > 100 && mhz <= 200) in sdhci_zynqmp_set_dynamic_config()
1765 mhz = 200; in sdhci_zynqmp_set_dynamic_config()
1766 else if (mhz > 50 && mhz <= 100) in sdhci_zynqmp_set_dynamic_config()
1767 mhz = 100; in sdhci_zynqmp_set_dynamic_config()
1768 else if (mhz > 25 && mhz <= 50) in sdhci_zynqmp_set_dynamic_config()
1769 mhz = 50; in sdhci_zynqmp_set_dynamic_config()
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-softing-vining-2000.dts417 pinctrl_usdhc2_50mhz: usdhc2grp-50mhz {
430 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
441 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
452 pinctrl_usdhc4_50mhz: usdhc4grp-50mhz {
468 pinctrl_usdhc4_100mhz: usdhc4-100mhz {
483 pinctrl_usdhc4_200mhz: usdhc4-200mhz {
H A Dimx6sl-tolino-shine3.dts193 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
204 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
237 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
248 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
H A Dimx6sll-kobo-clarahd.dts203 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
214 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
247 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
258 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-benchmark/lmbench/lmbench/
H A Dupdate-results-script.patch94 echo "Calculating mhz, please wait for a moment..."
95 -MHZ=`../bin/$OS/mhz`
96 +MHZ=`mhz`
98 I think your CPU mhz is

12345