Home
last modified time | relevance | path

Searched refs:memmap (Results 1 – 20 of 20) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Dopentitan.c83 const MemMapEntry *memmap = ibex_memmap; in opentitan_machine_init() local
100 memmap[IBEX_DEV_RAM].base, machine->ram); in opentitan_machine_init()
103 hwaddr firmware_load_addr = memmap[IBEX_DEV_RAM].base; in opentitan_machine_init()
110 memmap[IBEX_DEV_RAM].base, in opentitan_machine_init()
147 const MemMapEntry *memmap = ibex_memmap; in lowrisc_ibex_soc_realize() local
165 memmap[IBEX_DEV_ROM].size, &error_fatal); in lowrisc_ibex_soc_realize()
167 memmap[IBEX_DEV_ROM].base, &s->rom); in lowrisc_ibex_soc_realize()
171 memmap[IBEX_DEV_FLASH].size, &error_fatal); in lowrisc_ibex_soc_realize()
174 memmap[IBEX_DEV_FLASH_VIRTUAL].size); in lowrisc_ibex_soc_realize()
175 memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base, in lowrisc_ibex_soc_realize()
[all …]
H A Dsifive_e.c76 const MemMapEntry *memmap = sifive_e_memmap; in sifive_e_machine_init() local
96 memmap[SIFIVE_E_DEV_DTIM].base, machine->ram); in sifive_e_machine_init()
115 memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory); in sifive_e_machine_init()
120 memmap[SIFIVE_E_DEV_DTIM].base, in sifive_e_machine_init()
197 const MemMapEntry *memmap = sifive_e_memmap; in sifive_e_soc_realize() local
207 memmap[SIFIVE_E_DEV_MROM].size, &error_fatal); in sifive_e_soc_realize()
209 memmap[SIFIVE_E_DEV_MROM].base, &s->mask_rom); in sifive_e_soc_realize()
212 s->plic = sifive_plic_create(memmap[SIFIVE_E_DEV_PLIC].base, in sifive_e_soc_realize()
222 memmap[SIFIVE_E_DEV_PLIC].size); in sifive_e_soc_realize()
223 riscv_aclint_swi_create(memmap[SIFIVE_E_DEV_CLINT].base, in sifive_e_soc_realize()
[all …]
H A Dxiangshan_kmh.c60 const MemMapEntry *memmap = xiangshan_kmh_memmap; in xiangshan_kmh_create_aia() local
65 addr = memmap[XIANGSHAN_KMH_IMSIC_M].base; in xiangshan_kmh_create_aia()
72 addr = memmap[XIANGSHAN_KMH_IMSIC_S].base; in xiangshan_kmh_create_aia()
81 aplic_m = riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_M].base, in xiangshan_kmh_create_aia()
82 memmap[XIANGSHAN_KMH_APLIC_M].size, in xiangshan_kmh_create_aia()
87 riscv_aplic_create(memmap[XIANGSHAN_KMH_APLIC_S].base, in xiangshan_kmh_create_aia()
88 memmap[XIANGSHAN_KMH_APLIC_S].size, in xiangshan_kmh_create_aia()
99 const MemMapEntry *memmap = xiangshan_kmh_memmap; in xiangshan_kmh_soc_realize() local
113 serial_mm_init(system_memory, memmap[XIANGSHAN_KMH_UART0].base, 2, in xiangshan_kmh_soc_realize()
118 riscv_aclint_swi_create(memmap[XIANGSHAN_KMH_CLINT].base, in xiangshan_kmh_soc_realize()
[all …]
H A Dvirt-acpi-build.c79 imsic_socket_addr = s->memmap[VIRT_IMSIC_S].base + in riscv_acpi_madt_add_rintc()
242 .base_addr.addr = s->memmap[VIRT_UART0].base, in spcr_setup()
448 const MemMapEntry *memmap = s->memmap; in build_dsdt() local
465 fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]); in build_dsdt()
470 acpi_dsdt_add_plic_aplic(scope, socket_count, memmap[VIRT_PLIC].base, in build_dsdt()
471 memmap[VIRT_PLIC].size, "RSCV0001"); in build_dsdt()
473 acpi_dsdt_add_plic_aplic(scope, socket_count, memmap[VIRT_APLIC_S].base, in build_dsdt()
474 memmap[VIRT_APLIC_S].size, "RSCV0002"); in build_dsdt()
477 acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ); in build_dsdt()
479 acpi_dsdt_add_iommu_sys(scope, &memmap[VIRT_IOMMU_SYS], IOMMU_SYS_IRQ); in build_dsdt()
[all …]
/openbmc/qemu/hw/tricore/
H A Dtc27x_soc.c106 sc->memmap[TC27XD_DSPR0].base, sc->memmap[TC27XD_DSPR0].size); in tc27x_soc_init_memory_mapping()
108 sc->memmap[TC27XD_PSPR0].base, sc->memmap[TC27XD_PSPR0].size); in tc27x_soc_init_memory_mapping()
110 sc->memmap[TC27XD_DSPR1].base, sc->memmap[TC27XD_DSPR1].size); in tc27x_soc_init_memory_mapping()
112 sc->memmap[TC27XD_PSPR1].base, sc->memmap[TC27XD_PSPR1].size); in tc27x_soc_init_memory_mapping()
114 sc->memmap[TC27XD_DSPR2].base, sc->memmap[TC27XD_DSPR2].size); in tc27x_soc_init_memory_mapping()
116 sc->memmap[TC27XD_PSPR2].base, sc->memmap[TC27XD_PSPR2].size); in tc27x_soc_init_memory_mapping()
120 sc->memmap[TC27XD_DCACHE2].base, sc->memmap[TC27XD_DCACHE2].size); in tc27x_soc_init_memory_mapping()
122 sc->memmap[TC27XD_DTAG2].base, sc->memmap[TC27XD_DTAG2].size); in tc27x_soc_init_memory_mapping()
124 sc->memmap[TC27XD_PCACHE2].base, sc->memmap[TC27XD_PCACHE2].size); in tc27x_soc_init_memory_mapping()
126 sc->memmap[TC27XD_PTAG2].base, sc->memmap[TC27XD_PTAG2].size); in tc27x_soc_init_memory_mapping()
[all …]
/openbmc/qemu/hw/arm/
H A Dallwinner-h3.c190 rom_size, s->memmap[AW_H3_DEV_SRAM_A1], in allwinner_h3_bootrom_setup()
198 s->memmap = allwinner_h3_memmap; in allwinner_h3_init()
275 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, s->memmap[AW_H3_DEV_GIC_DIST]); in allwinner_h3_realize()
276 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, s->memmap[AW_H3_DEV_GIC_CPU]); in allwinner_h3_realize()
277 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 2, s->memmap[AW_H3_DEV_GIC_HYP]); in allwinner_h3_realize()
278 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 3, s->memmap[AW_H3_DEV_GIC_VCPU]); in allwinner_h3_realize()
325 sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, s->memmap[AW_H3_DEV_PIT]); in allwinner_h3_realize()
338 memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A1], in allwinner_h3_realize()
340 memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_A2], in allwinner_h3_realize()
342 memory_region_add_subregion(get_system_memory(), s->memmap[AW_H3_DEV_SRAM_C], in allwinner_h3_realize()
[all …]
H A Daspeed_ast10x0.c223 sc->memmap[ASPEED_DEV_IOMEM], in aspeed_soc_ast10x0_realize()
227 "aspeed.sbc", sc->memmap[ASPEED_DEV_SBC], in aspeed_soc_ast10x0_realize()
249 sc->memmap[ASPEED_DEV_SRAM], in aspeed_soc_ast10x0_realize()
257 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SECSRAM], in aspeed_soc_ast10x0_realize()
265 sc->memmap[ASPEED_DEV_SCU]); in aspeed_soc_ast10x0_realize()
275 sc->memmap[ASPEED_DEV_I2C]); in aspeed_soc_ast10x0_realize()
288 sc->memmap[ASPEED_DEV_I3C]); in aspeed_soc_ast10x0_realize()
299 sc->memmap[uart], errp)) { in aspeed_soc_ast10x0_realize()
313 sc->memmap[ASPEED_DEV_TIMER1]); in aspeed_soc_ast10x0_realize()
324 sc->memmap[ASPEED_DEV_ADC]); in aspeed_soc_ast10x0_realize()
[all …]
H A Daspeed_ast2600.c334 sc->memmap[ASPEED_DEV_PCIE_PHY1]); in aspeed_soc_ast2600_pcie_realize()
337 sc->memmap[ASPEED_DEV_SDRAM], in aspeed_soc_ast2600_pcie_realize()
345 sc->memmap[ASPEED_DEV_PCIE0]); in aspeed_soc_ast2600_pcie_realize()
354 sc->memmap[ASPEED_DEV_PCIE_MMIO1], in aspeed_soc_ast2600_pcie_realize()
357 sc->memmap[ASPEED_DEV_PCIE_MMIO1], in aspeed_soc_ast2600_pcie_realize()
376 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SPI_BOOT], in aspeed_soc_ast2600_realize()
382 sc->memmap[ASPEED_DEV_IOMEM], in aspeed_soc_ast2600_realize()
388 sc->memmap[ASPEED_DEV_VIDEO], 0x1000); in aspeed_soc_ast2600_realize()
394 sc->memmap[ASPEED_DEV_EMMC_BC], 0x1000); in aspeed_soc_ast2600_realize()
451 sc->memmap[ASPEED_DEV_SRAM], &s->sram); in aspeed_soc_ast2600_realize()
[all …]
H A Daspeed_ast2400.c266 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SPI_BOOT], in aspeed_ast2400_soc_realize()
272 sc->memmap[ASPEED_DEV_IOMEM], in aspeed_ast2400_soc_realize()
278 sc->memmap[ASPEED_DEV_VIDEO], 0x1000); in aspeed_ast2400_soc_realize()
296 sc->memmap[ASPEED_DEV_SRAM], &s->sram); in aspeed_ast2400_soc_realize()
303 sc->memmap[ASPEED_DEV_SCU]); in aspeed_ast2400_soc_realize()
310 sc->memmap[ASPEED_DEV_VIC]); in aspeed_ast2400_soc_realize()
321 sc->memmap[ASPEED_DEV_RTC]); in aspeed_ast2400_soc_realize()
332 sc->memmap[ASPEED_DEV_TIMER1]); in aspeed_ast2400_soc_realize()
343 sc->memmap[ASPEED_DEV_ADC]); in aspeed_ast2400_soc_realize()
350 sc->memmap[uart], errp)) { in aspeed_ast2400_soc_realize()
[all …]
H A Dallwinner-r40.c256 rom_size, s->memmap[AW_R40_DEV_SRAM_A1], in allwinner_r40_bootrom_setup()
268 s->memmap = allwinner_r40_memmap; in allwinner_r40_init()
348 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, s->memmap[AW_R40_DEV_GIC_DIST]); in allwinner_r40_realize()
349 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, s->memmap[AW_R40_DEV_GIC_CPU]); in allwinner_r40_realize()
350 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 2, s->memmap[AW_R40_DEV_GIC_HYP]); in allwinner_r40_realize()
351 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 3, s->memmap[AW_R40_DEV_GIC_VCPU]); in allwinner_r40_realize()
398 sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer), 0, s->memmap[AW_R40_DEV_PIT]); in allwinner_r40_realize()
408 sysbus_mmio_map(SYS_BUS_DEVICE(&s->sramc), 0, s->memmap[AW_R40_DEV_SRAMC]); in allwinner_r40_realize()
419 s->memmap[AW_R40_DEV_SRAM_A1], &s->sram_a1); in allwinner_r40_realize()
421 s->memmap[AW_R40_DEV_SRAM_A2], &s->sram_a2); in allwinner_r40_realize()
[all …]
H A Daspeed_ast27x0.c462 sc->memmap[ASPEED_DEV_SDRAM] + ram_size, in aspeed_soc_ast2700_dram_init()
467 sc->memmap[ASPEED_DEV_SDRAM], &s->dram_container); in aspeed_soc_ast2700_dram_init()
660 sc->memmap[ASPEED_GIC_DIST]); in aspeed_soc_ast2700_gic_realize()
662 sc->memmap[ASPEED_GIC_REDIST]); in aspeed_soc_ast2700_gic_realize()
718 sc->memmap[ASPEED_DEV_PCIE_PHY0 + i]); in aspeed_soc_ast2700_pcie_realize()
721 sc->memmap[ASPEED_DEV_SDRAM], in aspeed_soc_ast2700_pcie_realize()
729 sc->memmap[ASPEED_DEV_PCIE0 + i]); in aspeed_soc_ast2700_pcie_realize()
737 sc->memmap[ASPEED_DEV_PCIE_MMIO0 + i], in aspeed_soc_ast2700_pcie_realize()
740 sc->memmap[ASPEED_DEV_PCIE_MMIO0 + i], in aspeed_soc_ast2700_pcie_realize()
762 memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SPI_BOOT], in aspeed_soc_ast2700_realize()
[all …]
/openbmc/qemu/hw/dma/
H A Dsoc_dma.c80 } *memmap; member
114 lo = dma->memmap; in soc_dma_lookup()
133 while (entry < dma->memmap + dma->memmap_size && in soc_dma_ch_update_type()
265 dma->memmap = g_realloc(dma->memmap, sizeof(*entry) * in soc_dma_port_add_fifo()
284 while (entry < dma->memmap + dma->memmap_size && in soc_dma_port_add_fifo()
297 (uint8_t *) (dma->memmap + dma->memmap_size ++) - in soc_dma_port_add_fifo()
315 dma->memmap = g_realloc(dma->memmap, sizeof(*entry) * in soc_dma_port_add_mem()
344 while (entry < dma->memmap + dma->memmap_size && in soc_dma_port_add_mem()
350 (uint8_t *) (dma->memmap + dma->memmap_size ++) - in soc_dma_port_add_mem()
/openbmc/u-boot/cmd/
H A Defidebug.c413 struct efi_mem_desc *memmap = NULL, *map; in do_efi_show_memmap() local
419 ret = EFI_CALL(BS->get_memory_map(&map_size, memmap, NULL, NULL, NULL)); in do_efi_show_memmap()
423 map_size, (void *)&memmap)); in do_efi_show_memmap()
426 ret = EFI_CALL(BS->get_memory_map(&map_size, memmap, in do_efi_show_memmap()
430 EFI_CALL(BS->free_pool(memmap)); in do_efi_show_memmap()
438 for (i = 0, map = memmap; i < map_size / sizeof(*map); map++, i++) { in do_efi_show_memmap()
454 EFI_CALL(BS->free_pool(memmap)); in do_efi_show_memmap()
969 U_BOOT_CMD_MKENT(memmap, CONFIG_SYS_MAXARGS, 1, do_efi_show_memmap,
/openbmc/u-boot/arch/arm/mach-rmobile/
H A DMakefile15 obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
/openbmc/qemu/include/hw/arm/
H A Dallwinner-h3.h131 const hwaddr *memmap; member
H A Dallwinner-r40.h116 const hwaddr *memmap; member
H A Daspeed_soc.h190 const hwaddr *memmap; member
/openbmc/qemu/include/hw/tricore/
H A Dtc27x_soc.h90 const MemmapEntry *memmap; member
/openbmc/qemu/include/hw/riscv/
H A Dvirt.h63 const MemMapEntry *memmap; member
/openbmc/qemu/hw/openrisc/
H A Dvirt.c126 const struct MemmapEntry *memmap, in openrisc_create_fdt() argument
153 memmap[VIRT_DRAM].base); in openrisc_create_fdt()
156 memmap[VIRT_DRAM].base, mem_size); in openrisc_create_fdt()