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Searched refs:malidp_write32 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/arm/display/komeda/d71/
H A Dd71_component.c515 malidp_write32(c->reg, BLK_INPUT_ID0, 0); in d71_wb_layer_disable()
560 malidp_write32(reg, BLK_CONTROL, 0); in d71_component_disable()
570 malidp_write32(reg, CU_INPUT0_CONTROL + in d71_component_disable()
593 malidp_write32(cfg_reg, CU_INPUT0_SIZE, in compiz_enable_input()
595 malidp_write32(cfg_reg, CU_INPUT0_OFFSET, in compiz_enable_input()
616 malidp_write32(id_reg, BLK_INPUT_ID0, 0); in d71_compiz_update()
721 malidp_write32(reg, SC_COEFFTAB, val); in d71_scaler_update_filter_lut()
789 malidp_write32(reg, BLK_CONTROL, ctrl); in d71_scaler_update()
864 malidp_write32(c->reg, BLK_CONTROL, 0); in d71_scaler_init()
1193 malidp_write32(reg, BS_SYNC, value); in d71_timing_ctrlr_update()
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H A Dd71_dev.c90 malidp_write32(reg, BLK_IRQ_CLEAR, raw_status); in get_lpu_event()
116 malidp_write32(reg, BLK_IRQ_CLEAR, raw_status); in get_cu_event()
158 malidp_write32(reg, BLK_IRQ_CLEAR, raw_status); in get_dou_event()
201 malidp_write32(d71->gcu_addr, BLK_IRQ_CLEAR, raw_status); in d71_irq_handler()
305 malidp_write32(d71->gcu_addr, reg_offset, GCU_CONFIG_CVAL); in d71_flush()
313 malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST); in d71_reset()
/openbmc/linux/drivers/gpu/drm/arm/display/include/
H A Dmalidp_io.h19 malidp_write32(u32 __iomem *base, u32 offset, u32 v) in malidp_write32() function
37 malidp_write32(base, offset, v | tmp); in malidp_write32_mask()
46 malidp_write32(base, offset + i * 4, values[i]); in malidp_write_group()