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/openbmc/linux/drivers/gpu/drm/radeon/
H A Drv730_dpm.c244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
245 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
247 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
252 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
295 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
296 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
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H A Drv740_dpm.c337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
338 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
341 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
346 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
379 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
380 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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H A Dcypress_dpm.c778 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
785 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
792 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
797 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
798 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
799 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
802 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
803 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
804 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
806 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
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H A Dsumo_dpm.c347 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
411 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
670 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
762 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
844 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
845 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
862 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
863 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1053 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1054 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
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H A Drv770_dpm.c291 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
297 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
311 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
313 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
687 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
694 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
701 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
706 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
707 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
708 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
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H A Dtrinity_dpm.c805 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
925 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
926 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
939 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
940 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1287 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1310 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1365 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1366 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1372 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
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/openbmc/linux/drivers/video/backlight/
H A Dpwm_bl.c26 unsigned int *levels; member
82 if (pb->levels) in compute_duty_cycle()
83 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
208 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default()
209 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default()
210 if (!data->levels) in pwm_backlight_brightness_default()
220 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default()
266 data->levels = devm_kcalloc(dev, num_levels, in pwm_backlight_parse_dt()
267 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_parse_dt()
268 if (!data->levels) in pwm_backlight_parse_dt()
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H A Dled_bl.c20 unsigned int *levels; member
30 if (priv->levels) in led_bl_set_brightness()
31 bkl_brightness = priv->levels[level]; in led_bl_set_brightness()
138 u32 *levels = NULL; in led_bl_parse_levels() local
140 levels = devm_kzalloc(dev, sizeof(u32) * num_levels, in led_bl_parse_levels()
142 if (!levels) in led_bl_parse_levels()
146 levels, in led_bl_parse_levels()
157 if ((i && db > levels[i-1]) && db <= levels[i]) in led_bl_parse_levels()
162 priv->levels = levels; in led_bl_parse_levels()
/openbmc/linux/arch/powerpc/platforms/powernv/
H A Dpci-ioda-tce.c81 unsigned long size, unsigned int levels);
217 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument
222 if (levels) { in pnv_pci_ioda2_table_do_free_pages()
233 levels - 1); in pnv_pci_ioda2_table_do_free_pages()
257 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument
268 --levels; in pnv_pci_ioda2_table_do_alloc_pages()
269 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages()
276 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages()
291 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument
303 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages()
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/openbmc/qemu/util/
H A Dhbitmap.c98 unsigned long *levels[HBITMAP_LEVELS]; member
117 cur = hbi->cur[i] & hb->levels[i][pos]; in hbitmap_iter_skip_words()
139 cur = hb->levels[i + 1][pos]; in hbitmap_iter_skip_words()
152 hbi->hb->levels[HBITMAP_LEVELS - 1][hbi->pos]; in hbitmap_iter_next()
185 hbi->cur[i] = hb->levels[i][pos] & ~((1UL << bit) - 1); in hbitmap_iter_init()
223 unsigned long *last_lev = hb->levels[HBITMAP_LEVELS - 1]; in hbitmap_next_zero()
442 changed |= hb_set_elem(&hb->levels[level][i], start, next - 1); in hb_set_between()
449 changed |= (hb->levels[level][i] == 0); in hb_set_between()
450 hb->levels[level][i] = ~0UL; in hb_set_between()
453 changed |= hb_set_elem(&hb->levels[level][i], start, last); in hb_set_between()
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/openbmc/linux/arch/mips/kernel/
H A Dcacheinfo.c24 int levels = 0, leaves = 0; in init_cache_level() local
31 levels += 1; in init_cache_level()
39 levels++; in init_cache_level()
44 levels++; in init_cache_level()
49 levels++; in init_cache_level()
53 this_cpu_ci->num_levels = levels; in init_cache_level()
/openbmc/u-boot/drivers/video/
H A Dpwm_backlight.c42 u32 *levels; member
137 if (priv->levels) { in pwm_backlight_set_brightness()
138 level = priv->levels[percent * (priv->num_levels - 1) in pwm_backlight_set_brightness()
210 priv->levels = malloc(len); in pwm_backlight_ofdata_to_platdata()
211 if (!priv->levels) in pwm_backlight_ofdata_to_platdata()
213 dev_read_u32_array(dev, "brightness-levels", priv->levels, in pwm_backlight_ofdata_to_platdata()
216 priv->default_level = priv->levels[index]; in pwm_backlight_ofdata_to_platdata()
217 priv->max_level = priv->levels[count - 1]; in pwm_backlight_ofdata_to_platdata()
/openbmc/qemu/target/riscv/
H A Dmonitor.c148 int levels, ptidxbits, ptesize, vm, va_bits; in mem_info_svxx() local
166 levels = 2; in mem_info_svxx()
171 levels = 3; in mem_info_svxx()
176 levels = 4; in mem_info_svxx()
181 levels = 5; in mem_info_svxx()
190 va_bits = PGSHIFT + levels * ptidxbits; in mem_info_svxx()
202 walk_pte(mon, base, 0, levels - 1, ptidxbits, ptesize, va_bits, in mem_info_svxx()
/openbmc/linux/Documentation/scheduler/
H A Dsched-nice-design.rst6 nice-levels implementation in the new Linux scheduler.
8 Nice levels were always pretty weak under Linux and people continuously
16 In the O(1) scheduler (in 2003) we changed negative nice levels to be
58 To sum it up: we always wanted to make nice levels more consistent, but
83 nice levels were not 'punchy enough', so lots of people had to resort to
90 To address the first complaint (of nice levels being not "punchy"
92 (and granularity was made a separate concept from nice levels) and thus
98 To address the second complaint (of nice levels not being consistent),
100 tasks, regardless of their absolute nice levels. So on the new
104 levels were changed to be "multiplicative" (or exponential) - that way
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/openbmc/qemu/hw/intc/
H A Dheathrow_pic.c35 return (pic->events | (pic->levels & pic->level_triggered)) & pic->mask; in heathrow_check_irq()
98 value = pic->levels; in heathrow_read()
124 last_level = (pic->levels & irq_bit) ? 1 : 0; in heathrow_set_irq()
128 pic->levels |= irq_bit; in heathrow_set_irq()
130 pic->levels &= ~irq_bit; in heathrow_set_irq()
147 VMSTATE_UINT32(levels, HeathrowPICState),
/openbmc/qemu/hw/core/
H A Dor-irq.c38 s->levels[n] = level; in or_irq_handler()
41 or_level |= s->levels[i]; in or_irq_handler()
53 s->levels[i] = false; in or_irq_reset()
98 VMSTATE_VARRAY_UINT16_UNSAFE(levels, OrIRQState, num_lines, 0,
109 VMSTATE_BOOL_SUB_ARRAY(levels, OrIRQState, 0, OLD_MAX_OR_LINES),
/openbmc/qemu/scripts/
H A Dcpu-x86-uarch-abi.py20 levels = [ variable
128 for level in range(len(levels)):
130 want = set(levels[level])
147 for level in range(len(levels)):
185 for level in range(len(levels)):
/openbmc/linux/drivers/acpi/
H A Dacpi_video.c231 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
244 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
273 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
291 level = video->brightness->levels[state - 1]; in video_set_cur_state()
309 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
316 *levels = NULL; in acpi_video_device_lcd_query_levels()
328 *levels = obj; in acpi_video_device_lcd_query_levels()
354 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level()
546 level = device->brightness->levels[bqc_value + in acpi_video_bqc_value_to_level()
583 if (device->brightness->levels[i] == *level) { in acpi_video_device_lcd_get_level_current()
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/openbmc/bmcweb/src/
H A Dwebserver_cli.cpp22 static constexpr std::array<std::string, 7> levels{ variable
29 const std::string* iter = std::ranges::find(levels, input); in validateLogLevel()
30 if (iter == levels.end()) in validateLogLevel()
40 for (const std::string& prompt : levels) in helpMsg()
/openbmc/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm750-evb.dts286 cooling-levels = <127 255>;
291 cooling-levels = /bits/ 8 <127 255>;
296 cooling-levels = /bits/ 8 <127 255>;
301 cooling-levels = /bits/ 8 <127 255>;
306 cooling-levels = /bits/ 8 <127 255>;
311 cooling-levels = /bits/ 8 <127 255>;
316 cooling-levels = /bits/ 8 <127 255>;
321 cooling-levels = /bits/ 8 <127 255>;
/openbmc/linux/arch/arm64/mm/
H A Dtrans_pgd.c239 unsigned long level_mask, prev_level_entry, *levels[4]; in trans_pgd_idmap_page() local
246 levels[this_level] = trans_alloc(info); in trans_pgd_idmap_page()
247 if (!levels[this_level]) in trans_pgd_idmap_page()
255 *(levels[this_level] + index) = prev_level_entry; in trans_pgd_idmap_page()
257 pfn = virt_to_pfn(levels[this_level]); in trans_pgd_idmap_page()
/openbmc/linux/drivers/thermal/intel/int340x_thermal/
H A Dint3406_thermal.c60 acpi_level = d->br->levels[d->upper_limit - state]; in int3406_thermal_set_cur_state()
83 if (acpi_level <= d->br->levels[index]) in int3406_thermal_get_cur_state()
115 d->lower_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
120 d->upper_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
/openbmc/linux/arch/riscv/kernel/
H A Dcacheinfo.c79 int levels = 1, level = 1; in populate_cache_leaves() local
121 if (level <= levels) in populate_cache_leaves()
129 levels = level; in populate_cache_leaves()
/openbmc/linux/Documentation/arch/arm64/
H A Dmemory.rst8 Linux kernel. The architecture allows up to 4 levels of translation
9 tables with a 4KB page size and up to 3 levels with a 64KB page size.
11 AArch64 Linux uses either 3 levels or 4 levels of translation tables
14 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
29 AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::
46 AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support)::
/openbmc/linux/drivers/base/
H A Dcacheinfo.c292 unsigned int levels = 0, leaves, level; in init_of_cache_level() local
301 levels = 1; in init_of_cache_level()
311 if (level <= levels) in init_of_cache_level()
315 levels = level; in init_of_cache_level()
319 this_cpu_ci->num_levels = levels; in init_of_cache_level()
495 unsigned int levels = 0, split_levels = 0; in fetch_cache_info() local
501 ret = acpi_get_cache_info(cpu, &levels, &split_levels); in fetch_cache_info()
503 this_cpu_ci->num_levels = levels; in fetch_cache_info()
510 this_cpu_ci->num_leaves = levels + split_levels; in fetch_cache_info()

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