Searched refs:latch (Results 1 – 11 of 11) sorted by relevance
| /openbmc/qemu/hw/misc/ |
| H A D | mos6522.c | 164 counter = (d - (ti->counter_value + 1)) % (ti->latch + 2); in get_counter() 165 counter = (ti->latch - counter) & 0xffff; in get_counter() 203 counter = (d - (ti->counter_value + 1)) % (ti->latch + 2); in get_next_irq_time() 204 counter = (ti->latch - counter) & 0xffff; in get_next_irq_time() 209 next_time = d + ti->latch + 1; in get_next_irq_time() 211 next_time = d + ti->latch + 2; in get_next_irq_time() 215 trace_mos6522_get_next_irq_time(ti->latch, d, next_time - d); in get_next_irq_time() 349 val = s->timers[0].latch & 0xff; in mos6522_read() 353 val = (s->timers[0].latch >> 8) & 0xff; in mos6522_read() 433 s->timers[0].latch = (s->timers[0].latch & 0xff00) | val; in mos6522_write() [all …]
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| /openbmc/qemu/hw/block/ |
| H A D | swim.c | 283 uint8_t latch, reg, ism_bit; in iwmctrl_write() local 288 latch = (addr >> 1) & 7; in iwmctrl_write() 290 swimctrl->iwm_latches |= (1 << latch); in iwmctrl_write() 292 swimctrl->iwm_latches &= ~(1 << latch); in iwmctrl_write() 347 uint8_t latch, reg, value; in iwmctrl_read() local 352 latch = (addr >> 1) & 7; in iwmctrl_read() 354 swimctrl->iwm_latches |= (1 << latch); in iwmctrl_read() 356 swimctrl->iwm_latches &= ~(1 << latch); in iwmctrl_read()
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| /openbmc/skeleton/libopenbmc_intf/ |
| H A D | gpio_configs.c | 56 const cJSON* latch = cJSON_GetObjectItem(power_config, "latch_out"); in read_power_gpios() local 57 if (latch != NULL) in read_power_gpios() 59 gpios->power_gpio.latch_out.name = g_strdup(latch->valuestring); in read_power_gpios()
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| /openbmc/qemu/include/hw/misc/ |
| H A D | mos6522.h | 106 uint16_t latch; member
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| /openbmc/qemu/hw/display/ |
| H A D | vga.c | 852 s->latch = ((uint32_t *)s->vram_ptr)[addr]; in vga_mem_readb() 855 ret = GET_PLANE(s->latch, plane); in vga_mem_readb() 858 ret = (s->latch ^ mask16[s->gr[VGA_GFX_COMPARE_VALUE]]) & in vga_mem_readb() 974 val = s->latch; in vga_mem_writeb() 999 val &= s->latch; in vga_mem_writeb() 1003 val |= s->latch; in vga_mem_writeb() 1007 val ^= s->latch; in vga_mem_writeb() 1014 val = (val & bit_mask) | (s->latch & ~bit_mask); in vga_mem_writeb() 2139 VMSTATE_UINT32(latch, VGACommonState),
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| H A D | vga_int.h | 76 uint32_t latch; member
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| H A D | cirrus_vga.c | 2743 VMSTATE_UINT32(vga.latch, CirrusVGAState),
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| /openbmc/qemu/hw/xen/ |
| H A D | xen_pt.h | 216 uint32_t latch[4]; member
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| /openbmc/u-boot/doc/device-tree-bindings/pinctrl/ |
| H A D | pinctrl-bindings.txt | 179 bias-bus-hold - latch weakly
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| /openbmc/docs/designs/ |
| H A D | device-tree-gpio-naming.md | 153 needs more details on the cause of a reset. Hardware can be configured to latch
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| /openbmc/qemu/hw/arm/ |
| H A D | omap1.c | 1905 uint16_t latch; member 1933 s->latch = s->inputs; in omap_mpuio_set() 2003 return s->latch; in omap_mpuio_read() 2102 s->latch = 0; in omap_mpuio_reset()
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