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Searched refs:ixSQ_WAVE_TTMP7 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h104 #define ixSQ_WAVE_TTMP7 0x0277 macro
H A Dgfx_7_2_d.h1953 #define ixSQ_WAVE_TTMP7 0x277 macro
H A Dgfx_7_0_d.h1932 #define ixSQ_WAVE_TTMP7 0x277 macro
H A Dgfx_8_0_d.h2152 #define ixSQ_WAVE_TTMP7 0x277 macro
H A Dgfx_8_1_d.h2120 #define ixSQ_WAVE_TTMP7 0x277 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7118 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_9_2_1_offset.h7365 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_9_1_offset.h7326 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_9_4_2_offset.h7665 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_9_4_3_offset.h7428 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_10_1_0_offset.h11201 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_11_0_0_offset.h11661 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_11_0_3_offset.h12079 #define ixSQ_WAVE_TTMP7 macro
H A Dgc_10_3_0_offset.h13450 #define ixSQ_WAVE_TTMP7 macro