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Searched refs:ixSQ_WAVE_PC_HI (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h87 #define ixSQ_WAVE_PC_HI 0x0019 macro
H A Dgfx_7_2_d.h1930 #define ixSQ_WAVE_PC_HI 0x19 macro
H A Dgfx_7_0_d.h1909 #define ixSQ_WAVE_PC_HI 0x19 macro
H A Dgfx_8_0_d.h2128 #define ixSQ_WAVE_PC_HI 0x19 macro
H A Dgfx_8_1_d.h2096 #define ixSQ_WAVE_PC_HI 0x19 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_2.c1836 wave_pc_hi = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_2_log_cu_timeout_status()
H A Dgfx_v9_4_3.c583 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_3_read_wave_data()
3923 wave_pc_hi = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_3_log_cu_timeout_status()
H A Dgfx_v6_0.c2977 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v6_0_read_wave_data()
H A Dgfx_v7_0.c4118 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v7_0_read_wave_data()
H A Dgfx_v11_0.c791 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v11_0_read_wave_data()
H A Dgfx_v8_0.c5224 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data()
H A Dgfx_v9_0.c1777 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data()
H A Dgfx_v10_0.c4282 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7105 #define ixSQ_WAVE_PC_HI macro
H A Dgc_9_2_1_offset.h7352 #define ixSQ_WAVE_PC_HI macro
H A Dgc_9_1_offset.h7313 #define ixSQ_WAVE_PC_HI macro
H A Dgc_9_4_2_offset.h7653 #define ixSQ_WAVE_PC_HI macro
H A Dgc_9_4_3_offset.h7415 #define ixSQ_WAVE_PC_HI macro
H A Dgc_10_1_0_offset.h11184 #define ixSQ_WAVE_PC_HI macro
H A Dgc_11_0_0_offset.h11644 #define ixSQ_WAVE_PC_HI macro
H A Dgc_11_0_3_offset.h12061 #define ixSQ_WAVE_PC_HI macro
H A Dgc_10_3_0_offset.h13430 #define ixSQ_WAVE_PC_HI macro