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Searched refs:ixSINK_DESCRIPTION5 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h337 #define ixSINK_DESCRIPTION5 0x000A macro
H A Ddce_8_0_d.h5401 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_10_0_d.h6635 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_11_0_d.h6797 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_11_2_d.h8142 #define ixSINK_DESCRIPTION5 0xa macro
H A Ddce_12_0_offset.h18067 #define ixSINK_DESCRIPTION5 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7350 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_0_1_offset.h12193 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_2_1_0_offset.h12797 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_1_0_offset.h13037 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_1_2_offset.h14007 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_2_1_offset.h13483 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_1_5_offset.h14113 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_1_4_offset.h163 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_2_0_offset.h13504 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_1_6_offset.h14604 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_0_2_offset.h15086 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_2_0_0_offset.h16461 #define ixSINK_DESCRIPTION5 macro
H A Ddcn_3_0_0_offset.h16810 #define ixSINK_DESCRIPTION5 macro