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Searched refs:ixGRA02 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h303 #define ixGRA02 0x0002 macro
H A Ddce_8_0_d.h5102 #define ixGRA02 0x2 macro
H A Ddce_10_0_d.h5985 #define ixGRA02 0x2 macro
H A Ddce_11_0_d.h6062 #define ixGRA02 0x2 macro
H A Ddce_11_2_d.h7736 #define ixGRA02 0x2 macro
H A Ddce_12_0_offset.h18175 #define ixGRA02 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7224 #define ixGRA02 macro
H A Ddcn_3_0_1_offset.h12067 #define ixGRA02 macro
H A Ddcn_1_0_offset.h12806 #define ixGRA02 macro
H A Ddcn_2_1_0_offset.h12671 #define ixGRA02 macro
H A Ddcn_3_1_2_offset.h13881 #define ixGRA02 macro
H A Ddcn_3_1_5_offset.h13987 #define ixGRA02 macro
H A Ddcn_3_1_4_offset.h117 #define ixGRA02 macro
H A Ddcn_3_2_1_offset.h13357 #define ixGRA02 macro
H A Ddcn_3_2_0_offset.h13378 #define ixGRA02 macro
H A Ddcn_3_0_2_offset.h14960 #define ixGRA02 macro
H A Ddcn_3_1_6_offset.h14478 #define ixGRA02 macro
H A Ddcn_2_0_0_offset.h16335 #define ixGRA02 macro
H A Ddcn_3_0_0_offset.h16684 #define ixGRA02 macro