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Searched refs:ixDIDT_SQ_EDC_STALL_PATTERN_3_4 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c402 …{ ixDIDT_SQ_EDC_STALL_PATTERN_3_4, 0xFFFFFFFF, 0, …
431 …{ ixDIDT_SQ_EDC_STALL_PATTERN_3_4, 0xFFFFFFFF, 0, …
594 …{ ixDIDT_SQ_EDC_STALL_PATTERN_3_4, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_3_MASK, D…
595 …{ ixDIDT_SQ_EDC_STALL_PATTERN_3_4, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_4_MASK, D…
H A Dsmu7_hwmgr.c119 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 0x0016 macro
146 ixDIDT_SQ_EDC_STALL_PATTERN_3_4,
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7159 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro
H A Dgc_9_2_1_offset.h7409 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro
H A Dgc_9_1_offset.h7367 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro
H A Dgc_9_4_2_offset.h50 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro
H A Dgc_10_1_0_offset.h11245 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro
H A Dgc_10_3_0_offset.h13491 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 … macro