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Searched refs:ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h169 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 macro
H A Ddce_8_0_d.h5359 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 macro
H A Ddce_10_0_d.h6593 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 macro
H A Ddce_11_0_d.h6755 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 macro
H A Ddce_11_2_d.h8100 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 macro
H A Ddce_12_0_offset.h17959 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7274 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_0_1_offset.h12117 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_2_1_0_offset.h12721 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_1_0_offset.h12961 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_1_2_offset.h13931 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_2_1_offset.h13407 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_1_5_offset.h14037 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_1_4_offset.h1588 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_2_0_offset.h13428 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_1_6_offset.h14528 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_0_2_offset.h15010 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_2_0_0_offset.h16385 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro
H A Ddcn_3_0_0_offset.h16734 #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE … macro