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Searched refs:ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h95 #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x0037 macro
H A Ddce_8_0_d.h5546 #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x37 macro
H A Ddce_10_0_d.h6839 #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x37 macro
H A Ddce_11_0_d.h7002 #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x37 macro
H A Ddce_11_2_d.h8346 #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x37 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v6_0.c1173 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); in dce_v6_0_audio_write_latency_fields()
H A Ddce_v8_0.c1223 WREG32_AUDIO_ENDPT(offset, ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); in dce_v8_0_audio_write_latency_fields()
H A Ddce_v10_0.c1266 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); in dce_v10_0_audio_write_latency_fields()
H A Ddce_v11_0.c1298 ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp); in dce_v11_0_audio_write_latency_fields()