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Searched refs:ixATTR10 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h42 #define ixATTR10 0x0010 macro
H A Ddce_8_0_d.h5128 #define ixATTR10 0x10 macro
H A Ddce_10_0_d.h6011 #define ixATTR10 0x10 macro
H A Ddce_11_0_d.h6088 #define ixATTR10 0x10 macro
H A Ddce_11_2_d.h7762 #define ixATTR10 0x10 macro
H A Ddce_12_0_offset.h18202 #define ixATTR10 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7251 #define ixATTR10 … macro
H A Ddcn_3_0_1_offset.h12094 #define ixATTR10 … macro
H A Ddcn_2_1_0_offset.h12698 #define ixATTR10 … macro
H A Ddcn_1_0_offset.h12833 #define ixATTR10 … macro
H A Ddcn_3_1_2_offset.h13908 #define ixATTR10 … macro
H A Ddcn_3_2_1_offset.h13384 #define ixATTR10 … macro
H A Ddcn_3_1_5_offset.h14014 #define ixATTR10 … macro
H A Ddcn_3_1_4_offset.h144 #define ixATTR10 … macro
H A Ddcn_3_2_0_offset.h13405 #define ixATTR10 … macro
H A Ddcn_3_1_6_offset.h14505 #define ixATTR10 … macro
H A Ddcn_3_0_2_offset.h14987 #define ixATTR10 … macro
H A Ddcn_2_0_0_offset.h16362 #define ixATTR10 … macro
H A Ddcn_3_0_0_offset.h16711 #define ixATTR10 … macro