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Searched refs:ixATTR04 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h30 #define ixATTR04 0x0004 macro
H A Ddce_8_0_d.h5116 #define ixATTR04 0x4 macro
H A Ddce_10_0_d.h5999 #define ixATTR04 0x4 macro
H A Ddce_11_0_d.h6076 #define ixATTR04 0x4 macro
H A Ddce_11_2_d.h7750 #define ixATTR04 0x4 macro
H A Ddce_12_0_offset.h18190 #define ixATTR04 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h7239 #define ixATTR04 … macro
H A Ddcn_3_0_1_offset.h12082 #define ixATTR04 … macro
H A Ddcn_1_0_offset.h12821 #define ixATTR04 … macro
H A Ddcn_2_1_0_offset.h12686 #define ixATTR04 … macro
H A Ddcn_3_1_2_offset.h13896 #define ixATTR04 … macro
H A Ddcn_3_1_5_offset.h14002 #define ixATTR04 … macro
H A Ddcn_3_1_4_offset.h132 #define ixATTR04 … macro
H A Ddcn_3_2_1_offset.h13372 #define ixATTR04 … macro
H A Ddcn_3_2_0_offset.h13393 #define ixATTR04 … macro
H A Ddcn_3_0_2_offset.h14975 #define ixATTR04 … macro
H A Ddcn_3_1_6_offset.h14493 #define ixATTR04 … macro
H A Ddcn_2_0_0_offset.h16350 #define ixATTR04 … macro
H A Ddcn_3_0_0_offset.h16699 #define ixATTR04 … macro