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Searched refs:intel_guc_ggtt_offset (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_ads.c449 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_mmio_reg_state_init()
528 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_prep_golden_context()
612 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_init_golden_context()
694 ads_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma); in guc_capture_prep_lists()
827 base = intel_guc_ggtt_offset(guc, guc->ads_vma); in __guc_ads_init()
953 return intel_guc_ggtt_offset(guc, guc->ads_vma) + in intel_guc_engine_usage_offset()
H A Dintel_guc_hwconfig.c84 ggtt_offset = intel_guc_ggtt_offset(guc, vma); in guc_hwconfig_fill_buffer()
H A Dintel_guc_fw.c74 intel_guc_ggtt_offset(guc, guc_fw->rsa_data)); in guc_xfer_rsa_vma()
H A Dintel_guc_slpc.c175 u32 offset = intel_guc_ggtt_offset(guc, slpc->vma); in slpc_query_task_state()
337 u32 offset = intel_guc_ggtt_offset(guc, slpc->vma); in slpc_reset()
H A Dintel_guc.c243 offset = intel_guc_ggtt_offset(guc, log->vma) >> PAGE_SHIFT; in guc_ctl_log_params_flags()
259 u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT; in guc_ctl_ads_flags()
H A Dintel_guc.h371 static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc, in intel_guc_ggtt_offset() function
H A Dintel_huc.c510 ret = intel_guc_auth_huc(guc, intel_guc_ggtt_offset(guc, huc->fw.rsa_data)); in intel_huc_auth()
H A Dintel_guc_ct.c255 CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma), blob_size); in intel_guc_ct_init()
315 base = intel_guc_ggtt_offset(guc, ct->vma); in intel_guc_ct_enable()
H A Dintel_guc_submission.c2369 u32 offset = intel_guc_ggtt_offset(guc, guc->lrc_desc_pool_v69) + in register_context_v69()