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Searched refs:intc (Results 1 – 25 of 119) sorted by relevance

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/openbmc/u-boot/arch/microblaze/cpu/
H A Dinterrupts.c38 microblaze_intc_t *intc; variable
52 mask = intc->ier; in enable_one_interrupt()
53 intc->ier = (mask | offset); in enable_one_interrupt()
56 intc->ier); in enable_one_interrupt()
57 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in enable_one_interrupt()
58 intc->iar, intc->mer); in enable_one_interrupt()
67 mask = intc->ier; in disable_one_interrupt()
68 intc->ier = (mask & ~offset); in disable_one_interrupt()
71 intc->ier); in disable_one_interrupt()
72 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in disable_one_interrupt()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynq-7000.dtsi51 interrupt-parent = <&intc>;
70 interrupt-parent = <&intc>;
77 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
112 interrupt-parent = <&intc>;
121 interrupt-parent = <&intc>;
132 interrupt-parent = <&intc>;
139 intc: interrupt-controller@f8f01000 { label
184 interrupt-parent = <&intc>;
[all …]
H A Dzynq-cse-qspi.dtsi40 interrupt-parent = <&intc>;
43 intc: interrupt-controller@f8f01000 { label
56 interrupt-parent = <&intc>;
H A Dbcm2836.dtsi12 compatible = "brcm,bcm2836-l1-intc";
74 &intc {
H A Dzynq-cse-nor.dts39 interrupt-parent = <&intc>;
42 intc: interrupt-controller@f8f01000 { label
H A Domap3-evm-common.dtsi61 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
62 interrupt-parent = <&intc>;
118 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
H A Dbcm2837.dtsi12 compatible = "brcm,bcm2836-l1-intc";
72 &intc {
/openbmc/u-boot/arch/mips/dts/
H A Dmt7628a.dtsi58 interrupt-parent = <&intc>;
62 intc: interrupt-controller@200 { label
63 compatible = "ralink,rt2880-intc";
70 reset-names = "intc";
75 ralink,intc-registers = <0x9c 0xa0
92 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
146 interrupt-parent = <&intc>;
159 interrupt-parent = <&intc>;
192 interrupt-parent = <&intc>;
H A Djz4780.dtsi17 intc: interrupt-controller@10001000 { label
18 compatible = "ingenic,jz4780-intc";
74 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
102 interrupt-parent = <&intc>;
116 interrupt-parent = <&intc>;
130 interrupt-parent = <&intc>;
/openbmc/qemu/hw/microblaze/
H A Dxlnx-zynqmp-pmu.c55 XlnxPMUIOIntc intc; member
66 object_initialize_child(obj, "intc", &s->intc, TYPE_XLNX_PMU_IO_INTC); in xlnx_zynqmp_pmu_soc_init()
102 object_property_set_uint(OBJECT(&s->intc), "intc-intr-size", 0x10, in xlnx_zynqmp_pmu_soc_realize()
104 object_property_set_uint(OBJECT(&s->intc), "intc-level-edge", 0x0, in xlnx_zynqmp_pmu_soc_realize()
106 object_property_set_uint(OBJECT(&s->intc), "intc-positive", 0xffff, in xlnx_zynqmp_pmu_soc_realize()
108 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) { in xlnx_zynqmp_pmu_soc_realize()
111 sysbus_mmio_map(SYS_BUS_DEVICE(&s->intc), 0, XLNX_ZYNQMP_PMU_INTC_ADDR); in xlnx_zynqmp_pmu_soc_realize()
112 sysbus_connect_irq(SYS_BUS_DEVICE(&s->intc), 0, in xlnx_zynqmp_pmu_soc_realize()
120 qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); in xlnx_zynqmp_pmu_soc_realize()
/openbmc/qemu/hw/intc/
H A Dxics_spapr.c310 static void xics_spapr_dt(SpaprInterruptController *intc, uint32_t nr_servers, in xics_spapr_dt() argument
332 static int xics_spapr_cpu_intc_create(SpaprInterruptController *intc, in xics_spapr_cpu_intc_create() argument
335 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_cpu_intc_create()
348 static void xics_spapr_cpu_intc_reset(SpaprInterruptController *intc, in xics_spapr_cpu_intc_reset() argument
354 static void xics_spapr_cpu_intc_destroy(SpaprInterruptController *intc, in xics_spapr_cpu_intc_destroy() argument
363 static int xics_spapr_claim_irq(SpaprInterruptController *intc, int irq, in xics_spapr_claim_irq() argument
366 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_claim_irq()
380 static void xics_spapr_free_irq(SpaprInterruptController *intc, int irq) in xics_spapr_free_irq() argument
382 ICSState *ics = ICS_SPAPR(intc); in xics_spapr_free_irq()
390 static void xics_spapr_set_irq(SpaprInterruptController *intc, int irq, int val) in xics_spapr_set_irq() argument
[all …]
H A Dspapr_xive.c563 static int spapr_xive_post_load(SpaprInterruptController *intc, int version_id) in spapr_xive_post_load() argument
565 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_post_load()
590 static int spapr_xive_claim_irq(SpaprInterruptController *intc, int lisn, in spapr_xive_claim_irq() argument
593 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_claim_irq()
620 static void spapr_xive_free_irq(SpaprInterruptController *intc, int lisn) in spapr_xive_free_irq() argument
622 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_free_irq()
638 static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, in spapr_xive_cpu_intc_create() argument
641 SpaprXive *xive = SPAPR_XIVE(intc); in spapr_xive_cpu_intc_create()
660 static void spapr_xive_cpu_intc_reset(SpaprInterruptController *intc, in spapr_xive_cpu_intc_reset() argument
679 static void spapr_xive_cpu_intc_destroy(SpaprInterruptController *intc, in spapr_xive_cpu_intc_destroy() argument
[all …]
H A Domap_intc.c368 void omap_intc_set_iclk(OMAPIntcState *intc, omap_clk clk) in omap_intc_set_iclk() argument
370 intc->iclk = clk; in omap_intc_set_iclk()
373 void omap_intc_set_fclk(OMAPIntcState *intc, omap_clk clk) in omap_intc_set_fclk() argument
375 intc->fclk = clk; in omap_intc_set_fclk()
H A Dxics_kvm.c348 int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers, in xics_kvm_connect() argument
351 ICSState *ics = ICS_SPAPR(intc); in xics_kvm_connect()
449 xics_kvm_disconnect(intc); in xics_kvm_connect()
453 void xics_kvm_disconnect(SpaprInterruptController *intc) in xics_kvm_disconnect() argument
/openbmc/qemu/hw/sh4/
H A Dsh7750.c81 struct intc_desc intc; member
755 sh_intc_init(sysmem, &s->intc, NR_SOURCES, in sh7750_init()
759 sh_intc_register_sources(&s->intc, in sh7750_init()
763 cpu->env.intc_handle = &s->intc; in sh7750_init()
777 qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCI1_ERI]); in sh7750_init()
778 qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCI1_RXI]); in sh7750_init()
779 qdev_connect_gpio_out_named(dev, "txi", 0, s->intc.irqs[SCI1_TXI]); in sh7750_init()
780 qdev_connect_gpio_out_named(dev, "tei", 0, s->intc.irqs[SCI1_TEI]); in sh7750_init()
795 qdev_connect_gpio_out_named(dev, "eri", 0, s->intc.irqs[SCIF_ERI]); in sh7750_init()
796 qdev_connect_gpio_out_named(dev, "rxi", 0, s->intc.irqs[SCIF_RXI]); in sh7750_init()
[all …]
/openbmc/openbmc/poky/meta/recipes-devtools/qemu/qemu/
H A D0002-apic-fixup-fallthrough-to-PIC.patch28 hw/intc/apic.c | 2 +-
31 diff --git a/hw/intc/apic.c b/hw/intc/apic.c
33 --- a/hw/intc/apic.c
34 +++ b/hw/intc/apic.c
/openbmc/qemu/include/hw/ppc/
H A Dxics_spapr.h38 int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers,
40 void xics_kvm_disconnect(SpaprInterruptController *intc);
H A Dspapr_xive.h80 int kvmppc_xive_connect(SpaprInterruptController *intc, uint32_t nr_servers,
82 void kvmppc_xive_disconnect(SpaprInterruptController *intc);
/openbmc/u-boot/arch/nds32/dts/
H A Dag101p.dts6 interrupt-parent = <&intc>;
36 intc: interrupt-controller { label
H A Dae3xx.dts6 interrupt-parent = <&intc>;
43 intc: interrupt-controller { label
/openbmc/qemu/hw/arm/
H A Dallwinner-a10.c70 object_initialize_child(obj, "intc", &s->intc, TYPE_AW_A10_PIC); in aw_a10_init()
108 if (!sysbus_realize(SYS_BUS_DEVICE(&s->intc), errp)) { in aw_a10_realize()
111 sysbusdev = SYS_BUS_DEVICE(&s->intc); in aw_a10_realize()
117 qdev_pass_gpios(DEVICE(&s->intc), dev, NULL); in aw_a10_realize()
/openbmc/qemu/include/hw/core/
H A Dsysbus-fdt.h35 void platform_bus_add_all_fdt_nodes(void *fdt, const char *intc, hwaddr addr,
/openbmc/openbmc/poky/meta/lib/oeqa/runtime/cases/
H A Dparselogs-ignores-qemuarm64.txt5 irq: type mismatch, failed to map hwirq-27 for /intc
/openbmc/qemu/pc-bios/dtb/
H A Dpetalogix-ml605.dts144 interrupt-parent = < &intc >;
182 interrupt-parent = < &intc >;
205 interrupt-parent = < &intc >;
222 interrupt-parent = < &intc >;
234 intc: interrupt-controller@81800000 { label
236 compatible = "xlnx,axi-intc-1.01.a\0xlnx,xps-intc-1.00.a";
/openbmc/qemu/include/hw/arm/
H A Dallwinner-a10.h39 AwA10PICState intc; member

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