Searched refs:int_stat (Results 1 – 11 of 11) sorted by relevance
165 s->int_stat.u32 |= int_rq.u32; in ctucan_update_irq()166 if (s->int_stat.u32 & s->int_ena.u32) { in ctucan_update_irq()222 s->int_stat.u32 = 0; in ctucan_hardware_reset()249 union ctu_can_fd_int_stat int_stat; in ctucan_send_ready_buffers() local269 int_stat.u32 = 0; in ctucan_send_ready_buffers()278 int_stat.s.txi = 1; in ctucan_send_ready_buffers()279 int_stat.s.txbhci = 1; in ctucan_send_ready_buffers()280 s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32; in ctucan_send_ready_buffers()341 s->int_stat.u32 &= ~(uint32_t)val; in ctucan_mem_write()432 val = s->int_stat.u32; in ctucan_mem_read()[all …]
63 union ctu_can_fd_int_stat int_stat; member
76 qemu_set_irq(s->irq, s->int_stat && s->int_en); in tz_mpc_irq_update()178 r = s->int_stat; in tz_mpc_reg_read()301 s->int_stat = 0; in tz_mpc_reg_write()311 s->int_stat = R_INT_STAT_IRQ_MASK; in tz_mpc_reg_write()366 if (!s->int_stat) { in tz_mpc_handle_block()380 s->int_stat |= R_INT_STAT_IRQ_MASK; in tz_mpc_handle_block()478 s->int_stat = 0; in tz_mpc_reset()580 VMSTATE_UINT32(int_stat, TZMPC),
14 u32 int_stat; member
54 uint32_t int_stat; member
30 u32 int_stat; member
241 u32 int_stat[15]; member315 #define IPU_INT_STAT(n) (&IPU_STAT->int_stat[(n) - 1])
584 for (i = 0; i < ARRAY_SIZE(stat->int_stat); i++) { in ipuv3_fb_shutdown()585 __raw_writel(__raw_readl(&stat->int_stat[i]), in ipuv3_fb_shutdown()586 &stat->int_stat[i]); in ipuv3_fb_shutdown()
250 uint8_t int_stat; /* PCI interrupt status */ member392 if (s->int_stat) { in disable_interrupt()395 s->int_stat = 0; in disable_interrupt()401 if (!s->int_stat) { in enable_interrupt()404 s->int_stat = 1; in enable_interrupt()429 } else if (s->int_stat) { in eepro100_interrupt()1782 VMSTATE_UINT8(int_stat, EEPRO100State),
57 uint int_stat; /* _CMD_INT_STATUS_0 */ member
32 u32 int_stat; member