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Searched refs:imm2 (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/tests/tcg/tricore/asm/
H A Dmacros.h157 #define TEST_D_DIDI(insn, num, result, rs1, imm1, rs2, imm2) \ argument
162 insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
165 #define TEST_D_DDII(insn, num, result, rs1, rs2, imm1, imm2) \ argument
170 insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm1, imm2; \
182 #define TEST_D_DIII(insn, num, result, rs1, imm1, imm2, imm3)\ argument
186 insn DREG_CALC_RESULT, DREG_RS1, imm1, imm2, imm3; \
197 #define TEST_E_IDI(insn, num, res_hi, res_lo, imm1, rs1, imm2) \ argument
201 insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2; \
H A Dtest_insert.S5 # insn num result rs1 imm1 rs2 imm2
9 # insn num result rs1 imm1 imm2 imm3
H A Dtest_imask.S6 # insn num res[63:32] | imm1 rs1 imm2
/openbmc/qemu/target/riscv/
H A Dxthead.decode23 %imm2 25:2
31 &th_memidx rd rs1 rs2 imm2
32 &th_meminc rd rs1 imm5 imm2
43 @th_memidx ..... .. ..... ..... ... ..... ....... &th_memidx %rd %rs1 %rs2 %imm2
44 @th_meminc ..... .. ..... ..... ... ..... ....... &th_meminc %rd %rs1 %imm5 %imm2
/openbmc/u-boot/post/lib_powerpc/
H A Dcpu_asm.h162 #define ASM_122(opcode, rd, rs1, rs2, imm1, imm2) \ argument
168 ((imm2) << 1))
169 #define ASM_113(opcode, rd, rs, imm1, imm2, imm3) \ argument
174 ((imm2) << 6) + \
/openbmc/qemu/target/loongarch/
H A Dinsns.decode518 &vr_ii vd rj imm imm2
552 @vr_i8i1 .... ........ . imm2:1 ........ rj:5 vd:5 &vr_ii imm=%i8s3
553 @vr_i8i2 .... ........ imm2:2 ........ rj:5 vd:5 &vr_ii imm=%i8s2
554 @vr_i8i3 .... ....... imm2:3 ........ rj:5 vd:5 &vr_ii imm=%i8s1
555 @vr_i8i4 .... ...... imm2:4 imm:s8 rj:5 vd:5 &vr_ii
556 @vr_i8i2x .... ........ imm2:2 ........ rj:5 vd:5 &vr_ii imm=%i8s3
557 @vr_i8i3x .... ....... imm2:3 ........ rj:5 vd:5 &vr_ii imm=%i8s2
558 @vr_i8i4x .... ...... imm2:4 ........ rj:5 vd:5 &vr_ii imm=%i8s1
559 @vr_i8i5x .... ..... imm2:5 imm:s8 rj:5 vd:5 &vr_ii
H A Ddisas.c850 output(ctx, mnemonic, "v%d, r%d, 0x%x, 0x%x", a->vd, a->rj, a->imm, a->imm2); in output_vr_ii()
1775 output(ctx, mnemonic, "x%d, r%d, 0x%x, 0x%x", a->vd, a->rj, a->imm, a->imm2); in output_vr_ii_x()
/openbmc/qemu/target/arm/tcg/
H A Dcrypto_helper.c552 uint32_t imm2 = simd_data(desc); in crypto_sm3tt() local
555 assert(imm2 < 4); in crypto_sm3tt()
570 t += CR_ST_WORD(d, 0) + CR_ST_WORD(m, imm2); in crypto_sm3tt()
H A Dsve.decode463 INDEX_ii 00000100 esz:2 1 imm2:s5 010000 imm1:s5 rd:5
H A Dtranslate-sve.c1176 tcg_constant_i64(a->imm1), tcg_constant_i64(a->imm2))
/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc5431 tcg_gen_ld_i64(val, tcg_env, vec_reg_offset(a->vd, a->imm2, mop));