| /openbmc/u-boot/include/ |
| H A D | fm_eth.h | 60 #define FM_ETH_INFO_INITIALIZER(idx, pregs) \ argument
61 .fm = idx, \
66 #define FM_DTSEC_INFO_INITIALIZER(idx, n) \ argument
68 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC_MDIO_ADDR) \
69 .index = idx, \
72 .port = FM##idx##_DTSEC##n, \
75 .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
80 #define FM_TGEC_INFO_INITIALIZER(idx, n) \ argument
82 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
83 .index = idx, \
[all …]
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| /openbmc/u-boot/drivers/pinctrl/exynos/ |
| H A D | pinctrl-exynos.c | 25 unsigned int idx, val; in exynos_pinctrl_setup_peri() local
27 for (idx = 0; idx < num_conf; idx++) { in exynos_pinctrl_setup_peri()
28 val = readl(base + conf[idx].offset); in exynos_pinctrl_setup_peri()
29 val &= ~(conf[idx].mask); in exynos_pinctrl_setup_peri()
30 val |= conf[idx].value; in exynos_pinctrl_setup_peri()
31 writel(val, base + conf[idx].offset); in exynos_pinctrl_setup_peri()
42 u32 nr_banks = pin_ctrl->nr_banks, idx = 0; in pin_to_bank_base() local
49 while (pin_name[idx] != '-') { in pin_to_bank_base()
50 bank[idx] = pin_name[idx]; in pin_to_bank_base()
51 idx++; in pin_to_bank_base()
[all …]
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| /openbmc/u-boot/drivers/gpio/ |
| H A D | stm32f7_gpio.c | 30 int idx = 0; in stm32_offset_to_index() local
35 if (idx == offset) in stm32_offset_to_index()
36 return idx; in stm32_offset_to_index()
37 idx++; in stm32_offset_to_index()
50 int idx; in stm32_gpio_direction_input() local
52 idx = stm32_offset_to_index(dev, offset); in stm32_gpio_direction_input()
53 if (idx < 0) in stm32_gpio_direction_input()
54 return idx; in stm32_gpio_direction_input()
56 bits_index = MODE_BITS(idx); in stm32_gpio_direction_input()
71 int idx; in stm32_gpio_direction_output() local
[all …]
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| /openbmc/u-boot/tools/ |
| H A D | vybridimage.c | 66 int idx; in vybridimage_verify_header() local
86 for (idx = 0; idx < sizeof(hdr->fcb_bytes); idx++) { in vybridimage_verify_header()
87 uint8_t sw_ecc = vybridimage_sw_ecc(hdr->fcb_bytes[idx]); in vybridimage_verify_header()
88 if (sw_ecc != hdr->sw_ecc[idx]) in vybridimage_verify_header()
100 int idx; in vybridimage_set_header() local
127 for (idx = 0; idx < sizeof(hdr->fcb_bytes); idx++) in vybridimage_set_header()
128 hdr->sw_ecc[idx] = vybridimage_sw_ecc(hdr->fcb_bytes[idx]); in vybridimage_set_header()
132 int idx) in vybridimage_print_hdr_field() argument
134 printf("header.fcb[%d] = %08x\n", idx, hdr->fcb[idx]); in vybridimage_print_hdr_field()
141 int idx; in vybridimage_print_header() local
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| /openbmc/qemu/hw/hyperv/ |
| H A D | hv-balloon-our_range_memslots.c | 61 unsigned int idx; in our_range_memslots_init_slots() local
69 for (idx = 0, memslot_offset = 0; idx < memslots->count; in our_range_memslots_init_slots()
70 idx++, memslot_offset += memslots->size_each) { in our_range_memslots_init_slots()
75 if (idx == memslots->count - 1) { in our_range_memslots_init_slots()
85 name = g_strdup_printf("memslot-%u", idx); in our_range_memslots_init_slots()
86 memory_region_init_alias(&memslots->slots[idx], memslot_owner, name, in our_range_memslots_init_slots()
93 memory_region_set_unmergeable(&memslots->slots[idx], true); in our_range_memslots_init_slots()
123 unsigned int idx; in our_range_memslots_free_memslots() local
127 for (idx = 0, offset = 0; idx < memslots->mapped_count; in our_range_memslots_free_memslots()
128 idx++, offset += memslots->size_each) { in our_range_memslots_free_memslots()
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| /openbmc/qemu/scripts/ |
| H A D | qcow2-to-stdout.py | 50 def bitmap_set(bitmap, idx): argument
51 bitmap[idx // 8] |= 1 << (idx % 8)
54 def bitmap_is_set(bitmap, idx): argument
55 return (bitmap[idx // 8] & (1 << (idx % 8))) != 0
59 for idx in range(length):
60 if bitmap_is_set(bitmap, idx):
61 yield idx
77 for idx in range(data_from // cluster_size, data_to // cluster_size):
78 yield idx
184 for idx in range(l1_entries):
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| /openbmc/u-boot/lib/ |
| H A D | hashtable.c | 69 int idx);
206 unsigned int idx; in hmatch_r() local
209 for (idx = last_idx + 1; idx < htab->size; ++idx) { in hmatch_r()
210 if (htab->table[idx].used <= 0) in hmatch_r()
212 if (!strncmp(match, htab->table[idx].entry.key, key_len)) { in hmatch_r()
213 *retval = &htab->table[idx].entry; in hmatch_r()
214 return idx; in hmatch_r()
229 unsigned int hval, unsigned int idx) in _compare_and_overwrite_entry() argument
231 if (htab->table[idx].used == hval in _compare_and_overwrite_entry()
232 && strcmp(item.key, htab->table[idx].entry.key) == 0) { in _compare_and_overwrite_entry()
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| /openbmc/openbmc/poky/bitbake/lib/bb/ |
| H A D | remotedata.py | 40 idx = self.nextindex
41 self.datastores[idx] = d
43 self.locked.append(idx)
45 return idx
54 idx = key
57 idx = self.store(d, locked)
58 return idx
60 def release(self, idx): argument
62 if idx in self.locked:
63 raise Exception('Tried to release locked datastore %d' % idx)
[all …]
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| /openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| H A D | ctrl_pex.c | 25 u32 idx; in hws_pex_config() local
29 for (idx = 0; idx < count; idx++) { in hws_pex_config()
30 serdes_type = serdes_map[idx].serdes_type; in hws_pex_config()
37 ((serdes_map[idx].serdes_mode == PEX_ROOT_COMPLEX_X4) || in hws_pex_config()
38 (serdes_map[idx].serdes_mode == PEX_END_POINT_X4))) { in hws_pex_config()
53 for (idx = 0; idx < count; idx++) { in hws_pex_config()
54 serdes_type = serdes_map[idx].serdes_type; in hws_pex_config()
56 ((serdes_map[idx].serdes_mode == PEX_ROOT_COMPLEX_X4) || in hws_pex_config()
57 (serdes_map[idx].serdes_mode == PEX_END_POINT_X4))) { in hws_pex_config()
90 for (idx = 0; idx < count; idx++) { in hws_pex_config()
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| /openbmc/qemu/trace/ |
| H A D | simple.c | 79 static void read_from_buffer(unsigned int idx, void *dataptr, size_t size);
80 static unsigned int write_to_buffer(unsigned int idx, void *dataptr, size_t size);
82 static void clear_buffer_range(unsigned int idx, size_t len) in clear_buffer_range() argument
86 if (idx >= TRACE_BUF_LEN) { in clear_buffer_range()
87 idx = idx % TRACE_BUF_LEN; in clear_buffer_range()
89 trace_buf[idx++] = 0; in clear_buffer_range()
101 static bool get_trace_record(unsigned int idx, TraceRecord **recordptr) in get_trace_record() argument
106 read_from_buffer(idx, &record, sizeof(event_flag)); in get_trace_record()
114 read_from_buffer(idx, &record, sizeof(TraceRecord)); in get_trace_record()
117 read_from_buffer(idx, *recordptr, record.length); in get_trace_record()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| H A D | law.c | 33 static inline phys_addr_t get_law_base_addr(int idx) in get_law_base_addr() argument
37 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) | in get_law_base_addr()
38 in_be32(LAWBARL_ADDR(idx)); in get_law_base_addr()
40 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT; in get_law_base_addr()
44 static inline void set_law_base_addr(int idx, phys_addr_t addr) in set_law_base_addr() argument
47 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff); in set_law_base_addr()
48 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32); in set_law_base_addr()
50 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT); in set_law_base_addr()
54 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id) in set_law() argument
56 gd->arch.used_laws |= (1 << idx); in set_law()
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| /openbmc/qemu/target/i386/whpx/ |
| H A D | whpx-all.c | 390 int idx; in whpx_set_registers() local
413 idx = 0; in whpx_set_registers()
417 for (idx = 0; idx < CPU_NB_REGS; idx += 1) { in whpx_set_registers()
418 vcxt.values[idx].Reg64 = (uint64_t)env->regs[idx]; in whpx_set_registers()
420 idx = idx_next; in whpx_set_registers()
423 assert(whpx_register_names[idx] == WHvX64RegisterRip); in whpx_set_registers()
424 vcxt.values[idx++].Reg64 = env->eip; in whpx_set_registers()
426 assert(whpx_register_names[idx] == WHvX64RegisterRflags); in whpx_set_registers()
427 vcxt.values[idx++].Reg64 = env->eflags; in whpx_set_registers()
430 assert(idx == WHvX64RegisterEs); in whpx_set_registers()
[all …]
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| /openbmc/qemu/target/openrisc/ |
| H A D | sys_helper.c | 49 int idx; in HELPER() local
97 idx = (spr - 1024); in HELPER()
98 env->shadow_gpr[idx / 32][idx % 32] = rb; in HELPER()
102 idx = spr - TO_SPR(1, 512); in HELPER()
103 mr = env->tlb.dtlb[idx].mr; in HELPER()
110 env->tlb.dtlb[idx].mr = rb; in HELPER()
113 idx = spr - TO_SPR(1, 640); in HELPER()
114 env->tlb.dtlb[idx].tr = rb; in HELPER()
125 idx = spr - TO_SPR(2, 512); in HELPER()
126 mr = env->tlb.itlb[idx].mr; in HELPER()
[all …]
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| /openbmc/qemu/hw/pci-host/ |
| H A D | ppce500.c | 131 int idx; in pci_reg_read4() local
140 idx = (addr >> 5) & 0x7; in pci_reg_read4()
143 value = pci->pob[idx].potar; in pci_reg_read4()
146 value = pci->pob[idx].potear; in pci_reg_read4()
149 value = pci->pob[idx].powbar; in pci_reg_read4()
152 value = pci->pob[idx].powar; in pci_reg_read4()
162 idx = ((addr >> 5) & 0x3) - 1; in pci_reg_read4()
165 value = pci->pib[idx].pitar; in pci_reg_read4()
168 value = pci->pib[idx].piwbar; in pci_reg_read4()
171 value = pci->pib[idx].piwbear; in pci_reg_read4()
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| /openbmc/qemu/hw/riscv/ |
| H A D | riscv-iommu.h | 120 unsigned idx, uint32_t set, uint32_t clr) in riscv_iommu_reg_mod32() argument
122 uint32_t val = ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod32()
123 stl_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod32()
127 static inline void riscv_iommu_reg_set32(RISCVIOMMUState *s, unsigned idx, in riscv_iommu_reg_set32() argument
130 stl_le_p(s->regs_rw + idx, set); in riscv_iommu_reg_set32()
133 static inline uint32_t riscv_iommu_reg_get32(RISCVIOMMUState *s, unsigned idx) in riscv_iommu_reg_get32() argument
135 return ldl_le_p(s->regs_rw + idx); in riscv_iommu_reg_get32()
138 static inline uint64_t riscv_iommu_reg_mod64(RISCVIOMMUState *s, unsigned idx, in riscv_iommu_reg_mod64() argument
141 uint64_t val = ldq_le_p(s->regs_rw + idx); in riscv_iommu_reg_mod64()
142 stq_le_p(s->regs_rw + idx, (val & ~clr) | set); in riscv_iommu_reg_mod64()
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| H A D | riscv_hart.c | 115 static bool riscv_hart_realize(RISCVHartArrayState *s, int idx, in riscv_hart_realize() argument
118 object_initialize_child(OBJECT(s), "harts[*]", &s->harts[idx], cpu_type); in riscv_hart_realize()
119 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), "resetvec", s->resetvec); in riscv_hart_realize()
121 if (s->harts[idx].cfg.ext_smrnmi) { in riscv_hart_realize()
122 if (idx < s->num_rnmi_irqvec) { in riscv_hart_realize()
123 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
124 "rnmi-interrupt-vector", s->rnmi_irqvec[idx]); in riscv_hart_realize()
127 if (idx < s->num_rnmi_excpvec) { in riscv_hart_realize()
128 qdev_prop_set_uint64(DEVICE(&s->harts[idx]), in riscv_hart_realize()
129 "rnmi-exception-vector", s->rnmi_excpvec[idx]); in riscv_hart_realize()
[all …]
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| /openbmc/qemu/target/ppc/ |
| H A D | mmu-books.h | 27 static inline bool mmuidx_pr(int idx) { return !(idx & 1); } in mmuidx_pr() argument
28 static inline bool mmuidx_real(int idx) { return idx & 2; } in mmuidx_real() argument
29 static inline bool mmuidx_hv(int idx) { return idx & 4; } in mmuidx_hv() argument
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| /openbmc/ipmbbridge/ |
| H A D | ipmbutils.cpp | 32 for (uint8_t idx = 0; idx < length; idx++) in ipmbChecksumValidate() local
34 checksum += data[idx]; in ipmbChecksumValidate()
55 for (uint8_t idx = 0; idx < length; idx++) in ipmbChecksumCompute() local
57 checksum += data[idx]; in ipmbChecksumCompute()
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| /openbmc/u-boot/drivers/ram/stm32mp1/ |
| H A D | stm32mp1_ram.c | 29 int idx; in stm32mp1_ddr_clk_enable() local
31 for (idx = 0; idx < ARRAY_SIZE(clkname); idx++) { in stm32mp1_ddr_clk_enable()
32 ret = clk_get_by_name(priv->dev, clkname[idx], &clk); in stm32mp1_ddr_clk_enable()
38 printf("error for %s : %d\n", clkname[idx], ret); in stm32mp1_ddr_clk_enable()
62 int ret, idx; in stm32mp1_ddr_setup() local
97 for (idx = 0; idx < ARRAY_SIZE(param); idx++) { in stm32mp1_ddr_setup()
98 ret = dev_read_u32_array(dev, param[idx].name, in stm32mp1_ddr_setup()
100 param[idx].offset), in stm32mp1_ddr_setup()
101 param[idx].size); in stm32mp1_ddr_setup()
103 param[idx].name, param[idx].size, ret); in stm32mp1_ddr_setup()
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| /openbmc/qemu/tcg/ |
| H A D | tcg-op-ldst.c | 232 TCGArg idx, MemOp memop) in tcg_gen_qemu_ld_i32_int() argument
240 orig_oi = oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
248 oi = make_memop_idx(memop, idx); in tcg_gen_qemu_ld_i32_int()
272 void tcg_gen_qemu_ld_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_ld_i32_chk() argument
277 tcg_gen_qemu_ld_i32_int(val, addr, idx, memop); in tcg_gen_qemu_ld_i32_chk()
281 TCGArg idx, MemOp memop) in tcg_gen_qemu_st_i32_int() argument
288 orig_oi = oi = make_memop_idx(memop, idx); in tcg_gen_qemu_st_i32_int()
304 oi = make_memop_idx(memop, idx); in tcg_gen_qemu_st_i32_int()
315 void tcg_gen_qemu_st_i32_chk(TCGv_i32 val, TCGTemp *addr, TCGArg idx, in tcg_gen_qemu_st_i32_chk() argument
320 tcg_gen_qemu_st_i32_int(val, addr, idx, memop); in tcg_gen_qemu_st_i32_chk()
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| /openbmc/qemu/bsd-user/i386/ |
| H A D | target_arch_sysarch.h | 30 int idx; in do_freebsd_arch_sysarch() local
36 idx = R_GS; in do_freebsd_arch_sysarch()
38 idx = R_FS; in do_freebsd_arch_sysarch()
43 cpu_x86_load_seg(env, idx, 0); in do_freebsd_arch_sysarch()
44 env->segs[idx].base = val; in do_freebsd_arch_sysarch()
50 idx = R_GS; in do_freebsd_arch_sysarch()
52 idx = R_FS; in do_freebsd_arch_sysarch()
54 val = env->segs[idx].base; in do_freebsd_arch_sysarch()
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| /openbmc/qemu/bsd-user/x86_64/ |
| H A D | target_arch_sysarch.h | 29 int idx; in do_freebsd_arch_sysarch() local
35 idx = R_GS; in do_freebsd_arch_sysarch()
37 idx = R_FS; in do_freebsd_arch_sysarch()
42 cpu_x86_load_seg(env, idx, 0); in do_freebsd_arch_sysarch()
43 env->segs[idx].base = val; in do_freebsd_arch_sysarch()
49 idx = R_GS; in do_freebsd_arch_sysarch()
51 idx = R_FS; in do_freebsd_arch_sysarch()
53 val = env->segs[idx].base; in do_freebsd_arch_sysarch()
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| /openbmc/qemu/hw/misc/ |
| H A D | allwinner-h3-dramc.c | 102 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramcom_read() local
104 if (idx >= AW_H3_DRAMCOM_REGS_NUM) { in allwinner_h3_dramcom_read()
110 trace_allwinner_h3_dramcom_read(offset, s->dramcom[idx], size); in allwinner_h3_dramcom_read()
112 return s->dramcom[idx]; in allwinner_h3_dramcom_read()
119 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramcom_write() local
123 if (idx >= AW_H3_DRAMCOM_REGS_NUM) { in allwinner_h3_dramcom_write()
139 s->dramcom[idx] = (uint32_t) val; in allwinner_h3_dramcom_write()
146 const uint32_t idx = REG_INDEX(offset); in allwinner_h3_dramctl_read() local
148 if (idx >= AW_H3_DRAMCTL_REGS_NUM) { in allwinner_h3_dramctl_read()
154 trace_allwinner_h3_dramctl_read(offset, s->dramctl[idx], size); in allwinner_h3_dramctl_read()
[all …]
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_read_leveling.c | 342 int idx; in overrun() local
344 idx = pup + ecc * ECC_BIT; in overrun()
347 if (info->rl_val[cs][idx][S] == RL_UNLOCK_STATE) { in overrun()
350 if (info->rl_val[cs][idx][C] < RL_RETRY_COUNT) { in overrun()
353 info->rl_val[cs][idx][C]++; in overrun()
356 if (info->rl_val[cs][idx][C] == RL_RETRY_COUNT) { in overrun()
357 info->rl_val[cs][idx][C] = 0; in overrun()
358 info->rl_val[cs][idx][DS] = delay; in overrun()
359 info->rl_val[cs][idx][PS] = phase; in overrun()
362 info->rl_val[cs][idx][S] = RL_FINAL_STATE; in overrun()
[all …]
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| /openbmc/u-boot/drivers/power/regulator/ |
| H A D | lp87565_regulator.c | 126 int idx; in lp87565_buck_probe() local
131 idx = dev->driver_data; in lp87565_buck_probe()
132 if (idx == 0 || idx == 1 || idx == 2 || idx == 3) { in lp87565_buck_probe()
134 } else if (idx == 23) { in lp87565_buck_probe()
135 idx = 5; in lp87565_buck_probe()
136 } else if (idx == 10) { in lp87565_buck_probe()
137 idx = 4; in lp87565_buck_probe()
143 uc_pdata->ctrl_reg = lp87565_buck_ctrl1[idx]; in lp87565_buck_probe()
144 uc_pdata->volt_reg = lp87565_buck_vout[idx]; in lp87565_buck_probe()
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