/openbmc/qemu/linux-user/hppa/ |
H A D | cpu_loop.c | 132 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_loop() 133 env->iaoq_b = env->iaoq_f + 4; in cpu_loop() 143 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_loop() 144 env->iaoq_b = env->iaoq_f + 4; in cpu_loop() 150 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->iaoq_f); in cpu_loop() 161 force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVREG, env->iaoq_f); in cpu_loop() 164 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->iaoq_f); in cpu_loop() 170 force_sig_fault(TARGET_SIGFPE, 0, env->iaoq_f); in cpu_loop() 173 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f); in cpu_loop() 176 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->iaoq_f); in cpu_loop() [all …]
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H A D | target_cpu.h | 31 env->iaoq_f = env->gr[31] | PRIV_USER; in cpu_clone_regs_child() 32 env->iaoq_b = env->iaoq_f + 4; in cpu_clone_regs_child()
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H A D | signal.c | 68 __put_user(env->iaoq_f, &sc->sc_iaoq[0]); in setup_sigcontext() 103 __get_user(env->iaoq_f, &sc->sc_iaoq[0]); in restore_sigcontext() 104 env->iaoq_f |= PRIV_USER; in restore_sigcontext() 167 env->iaoq_f = haddr | PRIV_USER; in setup_rt_frame() 168 env->iaoq_b = env->iaoq_f + 4; in setup_rt_frame()
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/openbmc/qemu/target/hppa/ |
H A D | cpu.c | 38 cpu->env.iaoq_f = value; in hppa_cpu_set_pc() 47 env->iaoq_f & -4); in hppa_cpu_get_pc() 63 flags |= (env->iaoq_f & 3) << TB_FLAG_PRIV_SHIFT; in cpu_get_tb_cpu_state() 73 } else if ((env->iaoq_f ^ env->iaoq_b) & TARGET_PAGE_MASK) { in cpu_get_tb_cpu_state() 114 env->iaoq_f = (env->iaoq_f & TARGET_PAGE_MASK) | data[0]; in hppa_restore_state_to_opc() 116 env->iaoq_b = env->iaoq_f + data[1]; in hppa_restore_state_to_opc() 137 return PRIV_P_TO_MMU_IDX(env->iaoq_f & 3, env->psw & PSW_P); in hppa_cpu_mmu_index()
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H A D | int_helper.c | 115 hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32; in hppa_cpu_do_interrupt() 124 env->cr[CR_IIAOQ] = env->iaoq_f; in hppa_cpu_do_interrupt() 127 env->cr[CR_IIAOQ] = (uint32_t)env->iaoq_f; in hppa_cpu_do_interrupt() 162 vaddr vaddr = env->iaoq_f & -4; in hppa_cpu_do_interrupt() 198 env->iaoq_f = hppa_form_gva(env, 0, FIRMWARE_START); in hppa_cpu_do_interrupt() 203 env->iaoq_f = hppa_form_gva(env, 0, env->cr[CR_IVA] + 32 * i); in hppa_cpu_do_interrupt() 205 env->iaoq_b = hppa_form_gva(env, 0, env->iaoq_f + 4); in hppa_cpu_do_interrupt()
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H A D | sys_helper.c | 93 env->iaoq_f = env->cr[CR_IIAOQ]; in HELPER() 95 env->iasq_f = (env->cr[CR_IIASQ] << 32) & ~(env->iaoq_f & mask); in HELPER()
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H A D | mem_helper.c | 411 env->iasq_f, env->iaoq_f, physaddr); in hppa_cpu_do_transaction_failed() 790 uint64_t HELPER(b_gate_priv)(CPUHPPAState *env, uint64_t iaoq_f) in HELPER() 792 uint64_t gva = hppa_form_gva(env, env->iasq_f, iaoq_f); in HELPER() 807 int old_priv = iaoq_f & 3; in HELPER() 811 iaoq_f = (iaoq_f & -4) | new_priv; in HELPER() 814 return iaoq_f; in HELPER()
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H A D | gdbstub.c | 46 val = env->iaoq_f; in hppa_cpu_gdb_read_register() 169 env->iaoq_f = val; in hppa_cpu_gdb_write_register()
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H A D | helper.c | 135 env->iasq_f >> 32, w, m & env->iaoq_f, in hppa_cpu_dump_state() 136 hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f), in hppa_cpu_dump_state()
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H A D | machine.c | 195 VMSTATE_UINT64(iaoq_f, CPUHPPAState),
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H A D | cpu.h | 204 target_ulong iaoq_f; /* front */ member
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H A D | op_helper.c | 332 if (level < (env->iaoq_f & 3)) { in HELPER()
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H A D | translate.c | 280 DEF_VAR(iaoq_f), in hppa_translate_init() 4677 uint64_t iaoq_f, iaoq_b; in hppa_tr_insn_start() local 4682 iaoq_f = ctx->iaoq_first + ctx->iaq_f.disp; in hppa_tr_insn_start() 4687 diff = iaoq_b - iaoq_f; in hppa_tr_insn_start() 4693 tcg_gen_insn_start(iaoq_f & ~TARGET_PAGE_MASK, diff, 0); in hppa_tr_insn_start()
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/openbmc/linux/arch/parisc/include/asm/ |
H A D | kgdb.h | 34 unsigned long iaoq_f; member
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/openbmc/linux/arch/parisc/kernel/ |
H A D | kgdb.c | 88 gr->iaoq_f = regs->iaoq[0]; in pt_regs_to_gdb_regs() 119 regs->iaoq[0] = gr->iaoq_f; in gdb_regs_to_pt_regs()
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