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Searched refs:hwaddr (Results 1 – 25 of 1017) sorted by relevance

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/openbmc/qemu/include/exec/
H A Dmemory.h184 hwaddr start;
185 hwaddr end;
248 hwaddr start, hwaddr end, in iommu_notifier_init()
811 hwaddr addr;
1070 hwaddr addr, hwaddr len);
1085 hwaddr addr, hwaddr len);
2106 hwaddr addr, hwaddr size);
2722 hwaddr xlat;
2723 hwaddr len;
2871 hwaddr addr, hwaddr *xlat,
[all …]
H A Dmemory_ldst.h.inc24 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
26 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
28 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
30 hwaddr addr, uint32_t val, MemTxAttrs attrs, MemTxResult *result);
39 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
41 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
43 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
45 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
47 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
49 hwaddr addr, MemTxAttrs attrs, MemTxResult *result);
[all …]
H A Dmemory_ldst_phys.h.inc23 static inline uint16_t glue(lduw_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
29 static inline uint32_t glue(ldl_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
35 static inline uint64_t glue(ldq_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
41 static inline void glue(stw_phys, SUFFIX)(ARG1_DECL, hwaddr addr, uint16_t val)
59 static inline uint8_t glue(ldub_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
65 static inline uint16_t glue(lduw_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
71 static inline uint16_t glue(lduw_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
77 static inline uint32_t glue(ldl_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
83 static inline uint32_t glue(ldl_be_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
89 static inline uint64_t glue(ldq_le_phys, SUFFIX)(ARG1_DECL, hwaddr addr)
[all …]
H A Dcpu-common.h143 void cpu_physical_memory_rw(hwaddr addr, void *buf,
144 hwaddr len, bool is_write);
145 static inline void cpu_physical_memory_read(hwaddr addr, in cpu_physical_memory_read()
146 void *buf, hwaddr len) in cpu_physical_memory_read()
150 static inline void cpu_physical_memory_write(hwaddr addr, in cpu_physical_memory_write()
155 void *cpu_physical_memory_map(hwaddr addr,
156 hwaddr *plen,
158 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
159 bool is_write, hwaddr access_len);
163 bool cpu_physical_memory_is_io(hwaddr phys_addr);
[all …]
/openbmc/qemu/include/sysemu/
H A Dxen-mapcache.h14 typedef hwaddr (*phys_offset_to_gaddr_t)(hwaddr phys_offset,
20 uint8_t *xen_map_cache(hwaddr phys_addr, hwaddr size,
25 uint8_t *xen_replace_cache_entry(hwaddr old_phys_addr,
26 hwaddr new_phys_addr,
27 hwaddr size);
35 static inline uint8_t *xen_map_cache(hwaddr phys_addr, in xen_map_cache()
36 hwaddr size, in xen_map_cache()
56 static inline uint8_t *xen_replace_cache_entry(hwaddr old_phys_addr, in xen_replace_cache_entry()
57 hwaddr new_phys_addr, in xen_replace_cache_entry()
58 hwaddr size) in xen_replace_cache_entry()
/openbmc/qemu/include/hw/arm/
H A Dboot.h37 hwaddr mem_base, int mem_size);
46 hwaddr loader_start;
47 hwaddr dtb_start;
48 hwaddr dtb_limit;
59 hwaddr smp_loader_start;
60 hwaddr smp_bootreg_addr;
61 hwaddr gic_cpu_if_addr;
106 hwaddr initrd_start;
107 hwaddr initrd_size;
108 hwaddr entry;
[all …]
H A Dpxa.h72 DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu);
75 DeviceState *pxa2xx_gpio_init(hwaddr base,
80 DeviceState *pxa255_dma_init(hwaddr base, qemu_irq irq);
81 DeviceState *pxa27x_dma_init(hwaddr base, qemu_irq irq);
86 hwaddr base, qemu_irq irq);
94 hwaddr base,
114 hwaddr base,
123 PXA2xxI2CState *pxa2xx_i2c_init(hwaddr base,
153 hwaddr pm_base;
157 hwaddr cm_base;
[all …]
/openbmc/qemu/include/hw/riscv/
H A Dboot.h38 hwaddr firmware_load_addr,
44 hwaddr firmware_load_addr,
51 uint64_t riscv_compute_fdt_addr(hwaddr dram_start, uint64_t dram_size,
53 void riscv_load_fdt(hwaddr fdt_addr, void *fdt);
55 hwaddr saddr,
56 hwaddr rom_base, hwaddr rom_size,
59 void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base,
60 hwaddr rom_size,
63 void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr);
/openbmc/qemu/include/hw/
H A Dloader.h63 ssize_t load_image_targphys(const char *filename, hwaddr,
228 ssize_t load_uimage_as(const char *filename, hwaddr *ep,
229 hwaddr *loadaddr, int *is_linux,
237 ssize_t load_uimage(const char *filename, hwaddr *ep,
238 hwaddr *loadaddr, int *is_linux,
270 hwaddr dest, int buf_size,
274 hwaddr addr, int32_t bootindex,
277 size_t max_len, hwaddr addr,
308 int rom_copy(uint8_t *dest, hwaddr addr, size_t size);
309 void *rom_ptr(hwaddr addr, size_t size);
[all …]
/openbmc/qemu/hw/ppc/
H A De500.h31 hwaddr platform_bus_base;
32 hwaddr platform_bus_size;
35 hwaddr ccsrbar_base;
36 hwaddr pci_pio_base;
37 hwaddr pci_mmio_base;
38 hwaddr pci_mmio_bus_base;
39 hwaddr spin_base;
44 hwaddr booke206_page_size_to_tlb(uint64_t size);
/openbmc/qemu/target/i386/
H A Darch_memory_mapping.c20 hwaddr pte_start_addr, in walk_pte()
23 hwaddr pte_addr, start_paddr; in walk_pte()
53 hwaddr pte_addr, start_paddr; in walk_pte2()
82 hwaddr pde_start_addr, in walk_pde()
163 hwaddr pdpe_addr, pde_start_addr; in walk_pdpe2()
225 hwaddr pml4e_addr, pdpe_start_addr; in walk_pml4e()
248 hwaddr pml5e_addr, pml4e_start_addr; in walk_pml5e()
286 hwaddr pml5e_addr; in x86_cpu_get_memory_mapping()
291 hwaddr pml4e_addr; in x86_cpu_get_memory_mapping()
300 hwaddr pdpe_addr; in x86_cpu_get_memory_mapping()
[all …]
/openbmc/qemu/
H A Dmemory_ldst.c.inc30 hwaddr l = 4;
31 hwaddr addr1;
99 hwaddr l = 8;
100 hwaddr addr1;
166 hwaddr l = 1;
167 hwaddr addr1;
203 hwaddr l = 2;
204 hwaddr addr1;
272 hwaddr l = 4;
273 hwaddr addr1;
[all …]
/openbmc/qemu/include/hw/ppc/
H A Dpnv_xive.h61 hwaddr ic_base;
63 hwaddr vc_base;
65 hwaddr pc_base;
67 hwaddr tm_base;
122 hwaddr ic_base;
124 hwaddr esb_base;
126 hwaddr end_base;
128 hwaddr nvc_base;
130 hwaddr nvpg_base;
132 hwaddr tm_base;
/openbmc/qemu/target/riscv/
H A Dmonitor.c42 addr |= (hwaddr)-(1L << va_bits); in addr_canonical()
56 hwaddr paddr, target_ulong size, int attr) in print_pte()
80 static void walk_pte(Monitor *mon, hwaddr base, target_ulong start, in walk_pte()
82 target_ulong *vbase, hwaddr *pbase, hwaddr *last_paddr, in walk_pte()
85 hwaddr pte_addr; in walk_pte()
86 hwaddr paddr; in walk_pte()
105 paddr = (hwaddr)(pte >> PTE_PPN_SHIFT) << PGSHIFT; in walk_pte()
149 hwaddr base; in mem_info_svxx()
151 hwaddr pbase; in mem_info_svxx()
152 hwaddr last_paddr; in mem_info_svxx()
[all …]
/openbmc/qemu/hw/net/
H A Dvmware_utils.h29 vmw_shmem_read(PCIDevice *d, hwaddr addr, void *buf, int len) in vmw_shmem_read()
36 vmw_shmem_write(PCIDevice *d, hwaddr addr, void *buf, int len) in vmw_shmem_write()
55 vmw_shmem_set(PCIDevice *d, hwaddr addr, uint8_t val, int len) in vmw_shmem_set()
66 vmw_shmem_ld8(PCIDevice *d, hwaddr addr) in vmw_shmem_ld8()
75 vmw_shmem_st8(PCIDevice *d, hwaddr addr, uint8_t value) in vmw_shmem_st8()
82 vmw_shmem_ld16(PCIDevice *d, hwaddr addr) in vmw_shmem_ld16()
92 vmw_shmem_st16(PCIDevice *d, hwaddr addr, uint16_t value) in vmw_shmem_st16()
100 vmw_shmem_ld32(PCIDevice *d, hwaddr addr) in vmw_shmem_ld32()
110 vmw_shmem_st32(PCIDevice *d, hwaddr addr, uint32_t value) in vmw_shmem_st32()
118 vmw_shmem_ld64(PCIDevice *d, hwaddr addr) in vmw_shmem_ld64()
[all …]
/openbmc/qemu/target/ppc/
H A Dmmu-hash32.h6 hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash);
8 hwaddr *raddrp, int *psizep, int *protp, int mmu_idx,
63 static inline hwaddr ppc_hash32_hpt_base(PowerPCCPU *cpu) in ppc_hash32_hpt_base()
68 static inline hwaddr ppc_hash32_hpt_mask(PowerPCCPU *cpu) in ppc_hash32_hpt_mask()
74 hwaddr pte_offset) in ppc_hash32_load_hpte0()
82 hwaddr pte_offset) in ppc_hash32_load_hpte1()
90 hwaddr pte_offset, target_ulong pte0) in ppc_hash32_store_hpte0()
98 hwaddr pte_offset, target_ulong pte1) in ppc_hash32_store_hpte1()
H A Dmmu-hash32.c278 hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash) in get_pteg_offset32()
285 static hwaddr ppc_hash32_pteg_search(PowerPCCPU *cpu, hwaddr pteg_off, in ppc_hash32_pteg_search()
289 hwaddr pte_offset = pteg_off; in ppc_hash32_pteg_search()
320 hwaddr offset = pte_offset + 6; in ppc_hash32_set_r()
329 hwaddr offset = pte_offset + 7; in ppc_hash32_set_c()
339 hwaddr pteg_off, pte_offset; in ppc_hash32_htab_lookup()
340 hwaddr hash; in ppc_hash32_htab_lookup()
378 hwaddr rpn = pte.pte1 & HPTE32_R_RPN; in ppc_hash32_pte_raddr()
379 hwaddr mask = ~TARGET_PAGE_MASK; in ppc_hash32_pte_raddr()
391 hwaddr pte_offset; in ppc_hash32_xlate()
[all …]
/openbmc/qemu/hw/xen/
H A Dxen-mapcache.c52 hwaddr paddr_index;
58 hwaddr size;
64 hwaddr paddr_index;
65 hwaddr size;
254 static uint8_t *xen_map_cache_unlocked(hwaddr phys_addr, hwaddr size, in xen_map_cache_unlocked()
259 hwaddr address_index; in xen_map_cache_unlocked()
375 uint8_t *xen_map_cache(hwaddr phys_addr, hwaddr size, in xen_map_cache()
390 hwaddr paddr_index; in xen_ram_addr_from_mapcache()
391 hwaddr size; in xen_ram_addr_from_mapcache()
433 hwaddr paddr_index; in xen_invalidate_map_cache_entry_unlocked()
[all …]
/openbmc/qemu/system/
H A Dphysmem.c143 hwaddr base;
209 hwaddr step = (hwaddr)1 << (level * P_L2_BITS); in phys_page_set_level()
423 hwaddr page_mask = (hwaddr)-1; in address_space_translate_iommu()
496 hwaddr plen = (hwaddr)(-1); in flatview_do_translate()
2747 hwaddr l; in flatview_write()
2763 hwaddr len, hwaddr addr1, hwaddr l, in flatview_read_continue()
2825 hwaddr l; in flatview_read()
2917 hwaddr l; in address_space_write_rom_internal()
2960 void cpu_flush_icache_range(hwaddr start, hwaddr len) in cpu_flush_icache_range()
3098 static hwaddr
[all …]
/openbmc/qemu/include/qemu/
H A Diova-tree.h36 hwaddr iova;
37 hwaddr translated_addr;
38 hwaddr size; /* Inclusive */
125 const DMAMap *iova_tree_find_address(const IOVATree *tree, hwaddr iova);
153 int iova_tree_alloc_map(IOVATree *tree, DMAMap *map, hwaddr iova_begin,
154 hwaddr iova_end);
/openbmc/qemu/include/hw/vfio/
H A Dvfio-common.h108 hwaddr iommu_offset;
116 hwaddr offset_within_address_space;
117 hwaddr size;
124 hwaddr min_iova;
125 hwaddr max_iova;
206 hwaddr size;
207 hwaddr pages;
221 hwaddr iova, hwaddr size);
237 void vfio_region_write(void *opaque, hwaddr addr,
240 hwaddr addr, unsigned size);
[all …]
/openbmc/qemu/hw/alpha/
H A Dpci.c18 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) in ignore_read()
23 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) in ignore_write()
43 static uint64_t bw_conf1_read(void *opaque, hwaddr addr, in bw_conf1_read()
50 static void bw_conf1_write(void *opaque, hwaddr addr, in bw_conf1_write()
69 static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size) in iack_read()
74 static void special_write(void *opaque, hwaddr addr, in special_write()
/openbmc/qemu/include/hw/pci/
H A Dpcie_host.h35 #define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL)
43 hwaddr base_addr;
46 hwaddr size;
54 void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, uint32_t size);
57 hwaddr addr,
/openbmc/qemu/hw/misc/
H A Domap_l4.c25 hwaddr base;
31 hwaddr base, int ta_num) in omap_l4_init()
43 hwaddr omap_l4_region_base(struct omap_target_agent_s *ta, in omap_l4_region_base()
49 hwaddr omap_l4_region_size(struct omap_target_agent_s *ta, in omap_l4_region_size()
55 static uint64_t omap_l4ta_read(void *opaque, hwaddr addr, unsigned size) in omap_l4ta_read()
78 static void omap_l4ta_write(void *opaque, hwaddr addr, in omap_l4ta_write()
146 hwaddr omap_l4_attach(struct omap_target_agent_s *ta, in omap_l4_attach()
149 hwaddr base; in omap_l4_attach()
/openbmc/qemu/hw/xtensa/
H A Dvirt.c42 hwaddr addr_base) in create_pcie()
44 hwaddr base_ecam = addr_base + 0x00100000; in create_pcie()
45 hwaddr size_ecam = 0x03f00000; in create_pcie()
46 hwaddr base_pio = addr_base + 0x00000000; in create_pcie()
47 hwaddr size_pio = 0x00010000; in create_pcie()
48 hwaddr base_mmio = addr_base + 0x04000000; in create_pcie()
49 hwaddr size_mmio = 0x08000000; in create_pcie()

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