Home
last modified time | relevance | path

Searched refs:hw_intf (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder_phys_vid.c19 (e) && (e)->hw_intf ? \
20 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
25 (e) && (e)->hw_intf ? \
26 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
91 if (phys_enc->hw_intf->cap->type == INTF_DSI) { in drm_mode_to_intf_timing_params()
97 if (phys_enc->hw_intf->cap->type == INTF_DP) { in drm_mode_to_intf_timing_params()
111 if (phys_enc->hw_intf->cap->type == INTF_DP && timing->wide_bus_en) { in drm_mode_to_intf_timing_params()
157 phys_enc->hw_intf->cap->prog_fetch_lines_worst_case; in programmable_fetch_get_num_lines()
211 if (WARN_ON_ONCE(!phys_enc->hw_intf->ops.setup_prg_fetch)) in programmable_fetch_config()
229 phys_enc->hw_intf->ops.setup_prg_fetch(phys_enc->hw_intf, &f); in programmable_fetch_config()
[all …]
H A Ddpu_encoder_phys_cmd.c21 (e) ? (e)->base.hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
26 (e) ? (e)->base.hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
61 intf_cfg.intf = phys_enc->hw_intf->idx; in _dpu_encoder_phys_cmd_update_intf_cfg()
69 if (test_bit(DPU_CTL_ACTIVE_CFG, &ctl->caps->features) && phys_enc->hw_intf->ops.bind_pingpong_blk) in _dpu_encoder_phys_cmd_update_intf_cfg()
70 phys_enc->hw_intf->ops.bind_pingpong_blk( in _dpu_encoder_phys_cmd_update_intf_cfg()
71 phys_enc->hw_intf, in _dpu_encoder_phys_cmd_update_intf_cfg()
77 if (phys_enc->hw_intf->ops.program_intf_cmd_cfg) in _dpu_encoder_phys_cmd_update_intf_cfg()
78 phys_enc->hw_intf->ops.program_intf_cmd_cfg(phys_enc->hw_intf, &cmd_mode_cfg); in _dpu_encoder_phys_cmd_update_intf_cfg()
114 if (!phys_enc->hw_intf) in dpu_encoder_phys_cmd_te_rd_ptr_irq()
161 phys_enc->irq[INTR_IDX_RDPTR] = phys_enc->hw_intf->cap->intr_tear_rd_ptr; in dpu_encoder_phys_cmd_atomic_mode_set()
[all …]
H A Ddpu_encoder.c249 if (phys->hw_intf && phys->hw_intf->ops.setup_misr in dpu_encoder_get_crc_values_cnt()
250 && phys->hw_intf->ops.collect_misr) in dpu_encoder_get_crc_values_cnt()
268 if (!phys->hw_intf || !phys->hw_intf->ops.setup_misr) in dpu_encoder_setup_misr()
271 phys->hw_intf->ops.setup_misr(phys->hw_intf); in dpu_encoder_setup_misr()
291 if (!phys->hw_intf || !phys->hw_intf->ops.collect_misr) in dpu_encoder_get_crc()
294 rc = phys->hw_intf->ops.collect_misr(phys->hw_intf, &crcs[pos + entries_added]); in dpu_encoder_get_crc()
351 phys_enc->hw_intf ? phys_enc->hw_intf->idx - INTF_0 : -1, in dpu_encoder_helper_report_irq_timeout()
738 if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel) in _dpu_encoder_update_vsync_source()
739 phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf, in _dpu_encoder_update_vsync_source()
1435 ready_phys->hw_intf ? ready_phys->hw_intf->idx : -1, in dpu_encoder_frame_done_callback()
[all …]
H A Ddpu_rm.h30 struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; member
102 return rm->hw_intf[intf_idx - INTF_0]; in dpu_rm_get_intf()
H A Ddpu_encoder_phys.h181 struct dpu_hw_intf *hw_intf; member
261 struct dpu_hw_intf *hw_intf; member
H A Ddpu_rm.c81 for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++) in dpu_rm_destroy()
82 dpu_hw_intf_destroy(rm->hw_intf[i]); in dpu_rm_destroy()
171 rm->hw_intf[intf->id - INTF_0] = hw; in dpu_rm_init()