Searched refs:hifsys (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/ |
H A D | mediatek,hifsys.txt | 1 Mediatek hifsys controller 4 The Mediatek hifsys controller provides various clocks and reset 10 - "mediatek,mt2701-hifsys", "syscon" 11 - "mediatek,mt7622-hifsys", "syscon" 12 - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" 15 The hifsys controller uses the common clk binding from 21 hifsys: clock-controller@1a000000 { 22 compatible = "mediatek,mt2701-hifsys", "syscon";
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | mediatek-pcie.txt | 76 hifsys: syscon@1a000000 { 77 compatible = "mediatek,mt7623-hifsys", 78 "mediatek,mt2701-hifsys", 101 <&hifsys CLK_HIFSYS_PCIE0>, 102 <&hifsys CLK_HIFSYS_PCIE1>, 103 <&hifsys CLK_HIFSYS_PCIE2>; 105 resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, 106 <&hifsys MT2701_HIFSYS_PCIE1_RST>, 107 <&hifsys MT2701_HIFSYS_PCIE2_RST>;
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt7623.dtsi | 745 hifsys: syscon@1a000000 { label 746 compatible = "mediatek,mt7623-hifsys", 747 "mediatek,mt2701-hifsys", 770 <&hifsys CLK_HIFSYS_PCIE0>, 771 <&hifsys CLK_HIFSYS_PCIE1>, 772 <&hifsys CLK_HIFSYS_PCIE2>; 774 resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, 775 <&hifsys MT2701_HIFSYS_PCIE1_RST>, 776 <&hifsys MT2701_HIFSYS_PCIE2_RST>; 865 clocks = <&hifsys CLK_HIFSYS_USB0PHY>, [all …]
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H A D | mt2701.dtsi | 599 hifsys: syscon@1a000000 { label 600 compatible = "mediatek,mt2701-hifsys", "syscon"; 612 clocks = <&hifsys CLK_HIFSYS_USB0PHY>, 652 clocks = <&hifsys CLK_HIFSYS_USB1PHY>,
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | mediatek,net.yaml | 59 mediatek,hifsys: 62 Phandle to the mediatek hifsys controller used to provide various clocks 436 mediatek,hifsys = <&hifsys>;
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/openbmc/linux/drivers/net/ethernet/mediatek/ |
H A D | mtk_wed.h | 19 struct regmap *hifsys; member
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H A D | mtk_wed.c | 660 if (of_dma_is_coherent(wlan_node) && hw->hifsys) in __mtk_wed_detach() 661 regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, in __mtk_wed_detach() 1554 regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, in mtk_wed_attach() 1922 hw->hifsys = syscon_regmap_lookup_by_phandle(eth_np, in mtk_wed_add_hw() 1924 if (IS_ERR(hw->mirror) || IS_ERR(hw->hifsys)) { in mtk_wed_add_hw()
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt7622.dtsi | 919 hifsys: clock-controller@1af00000 { label 920 compatible = "mediatek,mt7622-hifsys"; 991 mediatek,hifsys = <&hifsys>;
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/openbmc/linux/drivers/clk/mediatek/ |
H A D | Kconfig | 48 bool "Clock driver for MediaTek MT2701 hifsys" 51 This driver supports MediaTek MT2701 hifsys clocks.
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