Searched refs:gvec (Results 1 – 9 of 9) sorted by relevance
/openbmc/qemu/hw/xen/ |
H A D | xen_pt_msi.c | 113 uint8_t gvec = msi_vector(data); in msi_msix_setup() local 127 *ppirq, is_msix ? "-X" : "", gvec, msix_entry); in msi_msix_setup() 146 is_msix ? "-X" : "", errno, gvec, msix_entry); in msi_msix_setup() 163 uint8_t gvec = msi_vector(data); in msi_msix_update() local 170 is_msix ? "-X" : "", pirq, gvec, gflags, msix_entry); in msi_msix_update() 178 rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, in msi_msix_update() 202 uint8_t gvec = msi_vector(data); in msi_msix_disable() local 212 is_msix ? "-X" : "", pirq, gvec); in msi_msix_disable() 213 rc = xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gflags); in msi_msix_disable() 216 is_msix ? "-X" : "", errno, pirq, gvec); in msi_msix_disable()
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/openbmc/qemu/accel/tcg/ |
H A D | meson.build | 9 'tcg-runtime-gvec.c',
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/openbmc/qemu/tcg/ |
H A D | meson.build | 14 'tcg-op-gvec.c',
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/openbmc/linux/arch/x86/kvm/ |
H A D | trace.h | 1078 unsigned int gsi, unsigned int gvec, 1080 TP_ARGS(host_irq, vcpu_id, gsi, gvec, pi_desc_addr, set), 1086 __field( unsigned int, gvec ) 1095 __entry->gvec = gvec; 1106 __entry->gvec,
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate_vx.c.inc | 15 * writes, we can use real gvec vector expansion, which potantially uses 19 * are handled via gvec ool (out-of-line) handlers. 23 * in fancy loops, as gvec expansion does not deal with actual element 32 * always 16 (128 bit). What gvec code calls "vece", s390x calls "es", 38 * As gvec ool-helpers can currently not return values (besides via
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/openbmc/qemu/target/hexagon/ |
H A D | README | 160 functions from tcg-op-gvec.h. Here's the override for this instruction.
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/openbmc/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 1151 * The gvec infrastructure is asserts that v128 vector loads 1160 * The gvec infrastructure only requires 16-byte alignment, 1196 * The gvec infrastructure is asserts that v128 vector loads 1212 * The gvec infrastructure only requires 16-byte alignment,
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvv.c.inc | 17 #include "tcg/tcg-op-gvec.h" 18 #include "tcg/tcg-gvec-desc.h"
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/openbmc/qemu/target/i386/tcg/ |
H A D | emit.c.inc | 4261 * Use a gvec move to move everything above the bottom 64 bits.
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