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Searched refs:gpr (Results 1 – 25 of 127) sorted by relevance

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/openbmc/qemu/bsd-user/riscv/
H A Dsignal.c41 regs->gpr[xA0] = sig; in set_sigtramp_args()
42 regs->gpr[xA1] = frame_addr + in set_sigtramp_args()
44 regs->gpr[xA2] = frame_addr + in set_sigtramp_args()
47 regs->gpr[xSP] = frame_addr; in set_sigtramp_args()
48 regs->gpr[xRA] = TARGET_PS_STRINGS - TARGET_SZSIGCODE; in set_sigtramp_args()
73 mcp->mc_gpregs.gp_t[0] = tswap64(regs->gpr[5]); in get_mcontext()
74 mcp->mc_gpregs.gp_t[1] = tswap64(regs->gpr[6]); in get_mcontext()
75 mcp->mc_gpregs.gp_t[2] = tswap64(regs->gpr[7]); in get_mcontext()
76 mcp->mc_gpregs.gp_t[3] = tswap64(regs->gpr[28]); in get_mcontext()
77 mcp->mc_gpregs.gp_t[4] = tswap64(regs->gpr[29]); in get_mcontext()
[all …]
H A Dtarget_arch_reg.h48 regs->ra = tswapreg(env->gpr[1]); in target_copy_regs()
49 regs->sp = tswapreg(env->gpr[2]); in target_copy_regs()
50 regs->gp = tswapreg(env->gpr[3]); in target_copy_regs()
51 regs->tp = tswapreg(env->gpr[4]); in target_copy_regs()
53 regs->t[0] = tswapreg(env->gpr[5]); in target_copy_regs()
54 regs->t[1] = tswapreg(env->gpr[6]); in target_copy_regs()
55 regs->t[2] = tswapreg(env->gpr[7]); in target_copy_regs()
56 regs->t[3] = tswapreg(env->gpr[28]); in target_copy_regs()
57 regs->t[4] = tswapreg(env->gpr[29]); in target_copy_regs()
58 regs->t[5] = tswapreg(env->gpr[30]); in target_copy_regs()
[all …]
H A Dtarget_arch_vmparam.h40 return state->gpr[xSP]; in get_sp_from_cpustate()
45 state->gpr[xA1] = retval2; in set_second_rval()
50 return state->gpr[xA1]; in get_second_rval()
H A Dtarget_arch_thread.h32 regs->gpr[xSP] = sp; in target_thread_set_upcall()
34 regs->gpr[xA0] = arg; in target_thread_set_upcall()
/openbmc/qemu/target/mips/tcg/system/
H A Dmips-semi.c122 int op = env->active_tc.gpr[25]; in report_fault()
161 env->active_tc.gpr[2] = ret; in uhi_cb()
162 env->active_tc.gpr[3] = err; in uhi_cb()
172 target_ulong addr = env->active_tc.gpr[5]; in uhi_fstat_cb()
222 target_ulong *gpr = env->active_tc.gpr; in mips_semihosting() local
223 const UHIOp op = gpr[25]; in mips_semihosting()
228 gdb_exit(gpr[4]); in mips_semihosting()
229 exit(gpr[4]); in mips_semihosting()
233 target_ulong fname = gpr[4]; in mips_semihosting()
251 gpr[2] = ret; in mips_semihosting()
[all …]
/openbmc/qemu/linux-user/ppc/
H A Dtarget_cpu.h26 env->gpr[1] = newsp; in cpu_clone_regs_child()
28 env->gpr[3] = 0; in cpu_clone_regs_child()
40 env->gpr[13] = newtls; in cpu_set_tls()
42 env->gpr[2] = newtls; in cpu_set_tls()
57 return state->gpr[1]; in get_sp_from_cpustate()
H A Dsignal.c254 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { in save_user_regs()
255 __put_user(env->gpr[i], &frame->mc_gregs[i]); in save_user_regs()
337 save_r2 = env->gpr[2]; in restore_user_regs()
341 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) { in restore_user_regs()
342 __get_user(env->gpr[i], &frame->mc_gregs[i]); in restore_user_regs()
354 env->gpr[2] = save_r2; in restore_user_regs()
456 err |= put_user(env->gpr[1], newsp, target_ulong); in setup_frame()
462 env->gpr[1] = newsp; in setup_frame()
463 env->gpr[3] = sig; in setup_frame()
464 env->gpr[4] = frame_addr + offsetof(struct target_sigframe, sctx); in setup_frame()
[all …]
/openbmc/u-boot/drivers/pci/
H A Dpcie_imx.c438 setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST); in imx6_pcie_assert_core_reset()
444 setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN); in imx6_pcie_assert_core_reset()
446 setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); in imx6_pcie_assert_core_reset()
464 gpr1 = readl(&iomuxc_regs->gpr[1]); in imx6_pcie_assert_core_reset()
465 gpr12 = readl(&iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
477 writel(val, &iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
480 setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); in imx6_pcie_assert_core_reset()
481 clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); in imx6_pcie_assert_core_reset()
491 clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE); in imx6_pcie_init_phy()
493 clrsetbits_le32(&iomuxc_regs->gpr[12], in imx6_pcie_init_phy()
[all …]
/openbmc/qemu/linux-user/loongarch64/
H A Dtarget_cpu.h15 env->gpr[3] = newsp; in cpu_clone_regs_child()
17 env->gpr[4] = 0; in cpu_clone_regs_child()
27 env->gpr[2] = newtls; in cpu_set_tls()
32 return state->gpr[3]; in get_sp_from_cpustate()
/openbmc/qemu/linux-user/riscv/
H A Dsignal.c36 abi_long gpr[31]; /* x0 is not present, so all offsets must be -1 */ member
87 __put_user(env->gpr[i], &sc->gpr[i - 1]); in setup_sigcontext()
131 env->gpr[xSP] = frame_addr; in setup_rt_frame()
132 env->gpr[xA0] = sig; in setup_rt_frame()
133 env->gpr[xA1] = frame_addr + offsetof(struct target_rt_sigframe, info); in setup_rt_frame()
134 env->gpr[xA2] = frame_addr + offsetof(struct target_rt_sigframe, uc); in setup_rt_frame()
135 env->gpr[xRA] = default_rt_sigreturn; in setup_rt_frame()
154 __get_user(env->gpr[i], &sc->gpr[i - 1]); in restore_sigcontext()
187 frame_addr = env->gpr[xSP]; in do_rt_sigreturn()
H A Dtarget_cpu.h8 env->gpr[xSP] = newsp; in cpu_clone_regs_child()
11 env->gpr[xA0] = 0; in cpu_clone_regs_child()
20 env->gpr[xTP] = newtls; in cpu_set_tls()
25 return state->gpr[xSP]; in get_sp_from_cpustate()
/openbmc/qemu/linux-user/hexagon/
H A Dtarget_cpu.h25 env->gpr[HEX_REG_SP] = newsp; in cpu_clone_regs_child()
27 env->gpr[0] = 0; in cpu_clone_regs_child()
36 env->gpr[HEX_REG_UGP] = newtls; in cpu_set_tls()
41 return state->gpr[HEX_REG_SP]; in get_sp_from_cpustate()
/openbmc/qemu/linux-user/mips/
H A Dtarget_cpu.h26 env->active_tc.gpr[29] = newsp; in cpu_clone_regs_child()
28 env->active_tc.gpr[7] = 0; in cpu_clone_regs_child()
29 env->active_tc.gpr[2] = 0; in cpu_clone_regs_child()
43 return state->active_tc.gpr[29]; in get_sp_from_cpustate()
H A Dsignal.c113 __put_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); in setup_sigcontext()
150 __get_user(regs->active_tc.gpr[i], &sc->sc_regs[i]); in restore_sigcontext()
228 regs->active_tc.gpr[ 4] = sig; in setup_frame()
229 regs->active_tc.gpr[ 5] = 0; in setup_frame()
230 regs->active_tc.gpr[ 6] = frame_addr + offsetof(struct sigframe, sf_sc); in setup_frame()
231 regs->active_tc.gpr[29] = frame_addr; in setup_frame()
232 regs->active_tc.gpr[31] = default_sigreturn; in setup_frame()
236 regs->active_tc.PC = regs->active_tc.gpr[25] = ka->_sa_handler; in setup_frame()
253 frame_addr = regs->active_tc.gpr[29]; in do_sigreturn()
328 env->active_tc.gpr[ 4] = sig; in setup_rt_frame()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dtraps.c71 printf("%08lX ", regs->gpr[i]); in show_regs()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
119 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
126 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
133 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
140 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/openbmc/qemu/hw/ppc/
H A Dspapr_nested.c141 memcpy(save->gpr, env->gpr, sizeof(save->gpr)); in nested_save_state()
240 memcpy(env->gpr, load->gpr, sizeof(env->gpr)); in nested_load_state()
389 len = sizeof(l2_state.gpr); in h_enter_nested()
390 assert(len == sizeof(regs->gpr)); in h_enter_nested()
391 memcpy(l2_state.gpr, regs->gpr, len); in h_enter_nested()
456 return env->gpr[3]; in h_enter_nested()
465 target_ulong hv_ptr = spapr_cpu->nested_host_state->gpr[4]; in spapr_exit_nested_hv()
466 target_ulong regs_ptr = spapr_cpu->nested_host_state->gpr[5]; in spapr_exit_nested_hv()
485 env->gpr[3] = env->excp_vectors[excp]; /* hcall return value */ in spapr_exit_nested_hv()
499 env->gpr[3] = H_PARAMETER; in spapr_exit_nested_hv()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dtraps.c78 printf("%08lX ", regs->gpr[i]); in show_regs()
89 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
135 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
146 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
171 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
182 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dtraps.c69 printf("%08lX ", regs->gpr[i]); in show_regs()
80 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
153 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
167 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
178 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
189 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dtraps.c106 printf("%08lX ", regs->gpr[i]); in show_regs()
118 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
187 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
209 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
232 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
277 print_backtrace((unsigned long *)regs->gpr[1]); in ExtIntException()
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dsoc.c52 struct iomuxc_gpr_base_regs *gpr = in enable_tzc380() local
56 setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); in enable_tzc380()
57 setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); in enable_tzc380()
/openbmc/u-boot/arch/microblaze/include/asm/
H A Dptrace.h68 microblaze_reg_t gpr[NUM_GPRS]; member
85 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
86 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
/openbmc/qemu/target/hexagon/
H A Dcpu.c112 value = regnum < 32 ? adjust_stack_ptrs(env, env->gpr[regnum]) in print_reg()
113 : env->gpr[regnum]; in print_reg()
188 if (env->gpr[HEX_REG_PC] == env->last_pc_dumped) { in hexagon_dump()
191 env->last_pc_dumped = env->gpr[HEX_REG_PC]; in hexagon_dump()
250 cpu_env(cs)->gpr[HEX_REG_PC] = value; in hexagon_cpu_set_pc()
255 return cpu_env(cs)->gpr[HEX_REG_PC]; in hexagon_cpu_get_pc()
261 vaddr pc = env->gpr[HEX_REG_PC]; in hexagon_get_tb_cpu_state()
264 if (pc == env->gpr[HEX_REG_SA0]) { in hexagon_get_tb_cpu_state()
278 cpu_env(cs)->gpr[HEX_REG_PC] = tb->pc; in hexagon_cpu_synchronize_from_tb()
285 cpu_env(cs)->gpr[HEX_REG_PC] = data[0]; in hexagon_restore_state_to_opc()
/openbmc/qemu/target/mips/tcg/
H A Dldst_helper.c224 env->active_tc.gpr[multiple_regs[i]] = in helper_lwm()
231 env->active_tc.gpr[31] = in helper_lwm()
246 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_swm()
253 cpu_stl_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_swm()
268 env->active_tc.gpr[multiple_regs[i]] = in helper_ldm()
275 env->active_tc.gpr[31] = in helper_ldm()
290 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], in helper_sdm()
297 cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); in helper_sdm()
/openbmc/qemu/target/ppc/
H A Dmem_helper.c95 env->gpr[reg] = (uint32_t)ldl_be_p(host); in helper_lmw()
101 env->gpr[reg] = cpu_ldl_mmuidx_ra(env, addr, mmu_idx, raddr); in helper_lmw()
117 stl_be_p(host, env->gpr[reg]); in helper_stmw()
123 cpu_stl_mmuidx_ra(env, addr, env->gpr[reg], mmu_idx, raddr); in helper_stmw()
146 env->gpr[reg] = (uint32_t)ldl_be_p(host); in do_lsw()
166 env->gpr[reg] = cpu_ldl_mmuidx_ra(env, addr, mmu_idx, raddr); in do_lsw()
186 env->gpr[reg] = val; in do_lsw()
235 stl_be_p(host, env->gpr[reg]); in helper_stsw()
239 val = env->gpr[reg]; in helper_stsw()
254 cpu_stl_mmuidx_ra(env, addr, env->gpr[reg], mmu_idx, raddr); in helper_stsw()
[all …]
/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dimx8mq_evk.c83 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
89 clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); in setup_fec()

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